公开(公告)号：US3599103A

公开(公告)日：1971-08-10

申请号：US3599103D

申请日：1968-07-05

Applicant: IBM

Inventor： NUSSBAUMER HENRI J ,  PARIS ETIENNE E

IPC: H03K5/00 ,  H04L7/00 ,  H04L7/02 ,  H04L7/027 ,  H03K5/18

CPC classification number: H04L7/0062 ,  H04L7/00 ,  H04L7/0066 ,  H04L7/027

Abstract: In a transmission system using a signal-phase shift to encode data, the clock for sampling of the signal for data recovery is maintained in phase with the transmitter clock by a detector which indicates the signal positions having the same voltage magnitudes at positions 90* apart in the signal cycle. The sampling clock is controlled to sample the signal at the indicated points thereby enabling other devices to translate the transmitted data.

公开(公告)号：CA889488A

公开(公告)日：1971-12-28

申请号：CA889488D

Applicant: IBM

Inventor： NUSSBAUMER HENRI J ,  PARIS ETIENNE E

公开(公告)号：CA879310A

公开(公告)日：1971-08-24

申请号：CA879310D

Applicant: IBM

Inventor： PARIS ETIENNE E ,  NUSSBAUMER HENRI J