公开(公告)号：CA1290069C

公开(公告)日：1991-10-01

申请号：CA558104

申请日：1988-02-04

Applicant: IBM

Inventor： HEATH CHESTER A ,  JACKSON KEVIN M ,  JUDICE DARRYL E ,  PESTONJI HOSHANG R

IPC: G06F9/48 ,  G06F9/46 ,  G06F13/24 ,  G06F15/78

Abstract: A personal computer system with associated interrupt controller is preferably designed to operate with programs and respond to interrupt related commands in one mode, such as level sensitive mode, but is provided with circuitry that enables the system to convert and respond to interrupt related software commands in another mode, such as edge sensitive (triggered) mode, the system there treating the edge mode signals just as if they were level mode signals. BC9-86-006

公开(公告)号：BR8800736A

公开(公告)日：1988-10-11

申请号：BR8800736

申请日：1988-02-23

Applicant: IBM

Inventor： HEATH CHESTER A ,  JACKSON KEVIN M ,  JUDICE DARRYL E ,  PESTONJI HOSHANG R

IPC: G06F9/48 ,  G06F9/46 ,  G06F13/24 ,  G06F15/78 ,  G06F13/26

Abstract: A personal computer system with associated interrupt controller is preferably designed to operate with programs and respond to interrupt related commands in one mode, such as level sensitive mode, but is provided with circuitry that enables the system to convert and respond to interrupt-related software commands in another mode, such as edge sensitive (triggered) mode, the system then treating the edge mode signals just as if they were level mode signals.