公开(公告)号：AU1465076A

公开(公告)日：1977-12-08

申请号：AU1465076

申请日：1976-06-04

Applicant: IBM

Inventor： FREEMAN LEO BOYES ,  INCERTO ROBERT JAMES ,  PETROSKY JOSEPH ANTHONY JR

IPC: G11C11/412 ,  H01L21/8236 ,  H01L27/088 ,  H01L29/78 ,  H03K3/356 ,  H03K17/00 ,  H03K17/041 ,  H03K19/017 ,  H03K19/0185 ,  H03K19/0944 ,  H03K19/21 ,  H03K19/08 ,  H03K19/32 ,  H01L29/80 ,  H01L27/06 ,  G11C11/40 ,  H03K19/30 ,  H03K19/24

Abstract: A circuit comprising the parallel connection of an enhancement-and a depletion-type FET which exhibits reduced power and improved performance for both logic as well as memory circuits.

公开(公告)号：CH607462A5

公开(公告)日：1978-12-29

申请号：CH650276

申请日：1976-05-24

Applicant: IBM

Inventor： FREEMAN LEO BOYES ,  INCERTO ROBERT JAMES ,  PETROSKY JOSEPH ANTHONY JR

IPC: G11C11/412 ,  H01L21/8236 ,  H01L27/088 ,  H01L29/78 ,  H03K3/356 ,  H03K17/00 ,  H03K17/041 ,  H03K19/017 ,  H03K19/0185 ,  H03K19/0944 ,  H03K19/21 ,  H03K19/08 ,  H01L27/04

Abstract: A circuit comprising the parallel connection of an enhancement-and a depletion-type FET which exhibits reduced power and improved performance for both logic as well as memory circuits.