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公开(公告)号:JPH10275100A
公开(公告)日:1998-10-13
申请号:JP4919098
申请日:1998-03-02
Applicant: IBM
Inventor: LARSEN TROY DALE , RANDOLPH JACK CHRIS , WOTTRENG ANDREW HENRY
IPC: G06F11/34
Abstract: PROBLEM TO BE SOLVED: To monitor the performance for every thread in a multi-thread processor by recording individually the 1st and 2nd events which are generated in response to the 1st and 2nd threads respectively. SOLUTION: A processor 10 includes a performance monitor 50 which supports-the performance monitoring jobs independent of each of plural parallel threads which are supported by the processor 10 itself. The monitor 50 receives the event occurrences which are generated by the operations of an IU 25, an FP 26, an FX 30, an SC 23, a BIU 12 and an L2 cache interface 58 as its input. Then the selected one of these many event occurrences is recorded into a software readable/writable PMC(performance monitor counter) that is included in the monitor 50.
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公开(公告)号:GB2324393A
公开(公告)日:1998-10-21
申请号:GB9803673
申请日:1998-02-24
Applicant: IBM
Inventor: LARSEN TROY DALE , RANDOLPH JACK CHRIS , WOTTRENG ANDREW HENRY
IPC: G06F11/34
Abstract: A method and system for performance monitoring within a multithreaded processor are provided. The system includes a processor responsive to instructions within first and second threads and a performance monitor that separately records a first event generated by the processor in response to the first thread and a second event generated by the processor in response to the second thread. In one embodiment, the processor has first and second modes of operation. In this embodiment, when the performance monitor is operating in the first mode, a first counter within the performance monitor increments in response to each occurrence of the first event and a second counter within the performance monitor increments in response to each occurrence of the second event. Alternatively, when the performance monitor is operating in the second mode, the first counter increments in response to each occurrence of the first event and in response to each occurrence of the second event.
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公开(公告)号:GB2324393B
公开(公告)日:2002-03-13
申请号:GB9803673
申请日:1998-02-24
Applicant: IBM
Inventor: LARSEN TROY DALE , RANDOLPH JACK CHRIS , WOTTRENG ANDREW HENRY
IPC: G06F11/34
Abstract: A method and system for performance monitoring within a multithreaded processor are provided. The system includes a processor responsive to instructions within first and second threads and a performance monitor that separately records a first event generated by the processor in response to the first thread and a second event generated by the processor in response to the second thread. In one embodiment, the processor has first and second modes of operation. In this embodiment, when the performance monitor is operating in the first mode, a first counter within the performance monitor increments in response to each occurrence of the first event and a second counter within the performance monitor increments in response to each occurrence of the second event. Alternatively, when the performance monitor is operating in the second mode, the first counter increments in response to each occurrence of the first event and in response to each occurrence of the second event.
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公开(公告)号:DE69024624D1
公开(公告)日:1996-02-15
申请号:DE69024624
申请日:1990-10-17
Applicant: IBM
Inventor: CLARK SCOTT DOUGLAS , HINZ KENNETH CLAUDE , RANDOLPH JACK CHRIS , RUDQUIST MARK LOREN , WALKER THOMAS MILTON
IPC: G06F11/22 , G06F11/267 , G06F13/00 , G06F15/78
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公开(公告)号:HK1015049A1
公开(公告)日:1999-10-08
申请号:HK99100012
申请日:1999-01-05
Applicant: IBM
Inventor: LARSEN TROY DALE , RANDOLPH JACK CHRIS , WOTTRENG ANDREW HENRY
Abstract: A method and system for performance monitoring within a multithreaded processor are provided. The system includes a processor responsive to instructions within first and second threads and a performance monitor that separately records a first event generated by the processor in response to the first thread and a second event generated by the processor in response to the second thread. In one embodiment, the processor has first and second modes of operation. In this embodiment, when the performance monitor is operating in the first mode, a first counter within the performance monitor increments in response to each occurrence of the first event and a second counter within the performance monitor increments in response to each occurrence of the second event. Alternatively, when the performance monitor is operating in the second mode, the first counter increments in response to each occurrence of the first event and in response to each occurrence of the second event.
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公开(公告)号:SG60202A1
公开(公告)日:1999-02-22
申请号:SG1998000357
申请日:1998-02-19
Applicant: IBM
Inventor: LARSEN TROY DALE , RANDOLPH JACK CHRIS , WOTTRENG ANDREW HENRY
Abstract: A method and system for performance monitoring within a multithreaded processor are provided. The system includes a processor responsive to instructions within first and second threads and a performance monitor that separately records a first event generated by the processor in response to the first thread and a second event generated by the processor in response to the second thread. In one embodiment, the processor has first and second modes of operation. In this embodiment, when the performance monitor is operating in the first mode, a first counter within the performance monitor increments in response to each occurrence of the first event and a second counter within the performance monitor increments in response to each occurrence of the second event. Alternatively, when the performance monitor is operating in the second mode, the first counter increments in response to each occurrence of the first event and in response to each occurrence of the second event.
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公开(公告)号:DE69024624T2
公开(公告)日:1996-07-04
申请号:DE69024624
申请日:1990-10-17
Applicant: IBM
Inventor: CLARK SCOTT DOUGLAS , HINZ KENNETH CLAUDE , RANDOLPH JACK CHRIS , RUDQUIST MARK LOREN , WALKER THOMAS MILTON
IPC: G06F11/22 , G06F11/267 , G06F13/00 , G06F15/78
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