公开(公告)号：GB2462165A9

公开(公告)日：2010-03-24

申请号：GB0910505

申请日：2009-06-18

Applicant: IBM

Inventor： HELMS MARKUS ,  RIDER SCOTT H ,  TARR GABRIEL MARTEL

IPC: G06F17/00

公开(公告)号：GB2462165A

公开(公告)日：2010-02-03

申请号：GB0910505

申请日：2009-06-18

Applicant: IBM

Inventor： HELMS MARKUS ,  RIDER SCOTT H ,  TARR GABRIEL MARTEL

IPC: G06F17/50

Abstract: A method for optimising a hardware design wherein the hardware design is given as hardware description language file using a certain hardware description language code (e.g. VHDL) comprises parsing the hardware description language file of the hardware design into at least one object. The at least one object is analysed to detect an optimisable object, which meets a least one given condition. A first condition is met, when an operation of the analysed object exploits a loop structure, transforming the optimisable object (unbalanced tree) into a new optimised object (i.e. converted into a unfolded parallel structure (see Fig. 4)) which operates a matching recursive algorithm. The new optimised object uses the same hardware description language as the optimisable object, and the new optimized object replaces the optimisable object in the hardware description language file.