公开(公告)号：JPH03200121A

公开(公告)日：1991-09-02

申请号：JP30694090

申请日：1990-11-13

Applicant: IBM

Inventor： RESURII CHIYAARUSU JIENKINSU ,  ROBAATO RUUKU UISUNIIFU

IPC: G01R27/26 ,  G01R31/26 ,  G02F1/13 ,  G02F1/136 ,  G02F1/1368 ,  G09G3/36 ,  H01L21/66

Abstract: PURPOSE: To quickly and economically test each cell in an array by providing a first integral circuit which is added to a thin film transistor/liquid crystal display (TFT/LCD) cell capacitor through a data line, a first gate supply voltage which drives the gate of a thin film transistor TFT, and a reset circuit which resets the integral circuit. CONSTITUTION: A detection circuit 230 which detects the electric charge on a TFT/LCD cell capacitor 220 is provided with a first integral circuit 232 which is added to the TFT/LCD cell capacitor 220 through a data line 218, and the data line 218 is connected to the cell capacitor 220 through a TFT 210. The TFT 210 has a source 212 connected to the cell capacitor 220 and has a drain 214 connected to a data line 218. The first gate supply voltage drives the gate of the TFT 210, and a reset circuit S3 resets the integral circuit 232. Thus, the state of each transistor is displayed, and further, the leak current and CGS of each cell are measured.