公开(公告)号：JPH075408A

公开(公告)日：1995-01-10

申请号：JP2387394

申请日：1994-02-22

Applicant: IBM

Inventor： ICHIOKA ZENICHI ,  RESURII CHIYAARUSU JIENKINSU ,  KIMURA SHINICHI ,  ROBAATO JIYON PORASUTORU ,  RONARUDO ROI TORAUTOMAN ,  ROBAATO RUUKU UIZUNIFU

IPC: G01R31/02 ,  G02F1/13 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/00

Abstract: PURPOSE: To provide a method for specifying the type of the defect of a TFT/ LCD array. CONSTITUTION: In a TFT/LCD, a driving pulse is impressed to the end part to be driven of a gate line 24, it is confirmed that the gate line is not disconnected, that is, it is continuous by observing the presence of a corresponding characteristic pulse on a first data line 20 close to the driven end part of this gate line and the presence of the corresponding characteristic pulse on a second data line passing through the opposite end part to this driven end part. In the same way, the gate lines are successively tested, the continuous gate lines at the uppermost side and the continuous gate lines at the lowermost side are found on a display panel, and the completeness of all data lines is evaluated by using those continuous gate lines at the uppermost and lowermost sides. Thus, this TFT/LCD array can be tested.

公开(公告)号：JPH03200121A

公开(公告)日：1991-09-02

申请号：JP30694090

申请日：1990-11-13

Applicant: IBM

Inventor： RESURII CHIYAARUSU JIENKINSU ,  ROBAATO RUUKU UISUNIIFU

IPC: G01R27/26 ,  G01R31/26 ,  G02F1/13 ,  G02F1/136 ,  G02F1/1368 ,  G09G3/36 ,  H01L21/66

Abstract: PURPOSE: To quickly and economically test each cell in an array by providing a first integral circuit which is added to a thin film transistor/liquid crystal display (TFT/LCD) cell capacitor through a data line, a first gate supply voltage which drives the gate of a thin film transistor TFT, and a reset circuit which resets the integral circuit. CONSTITUTION: A detection circuit 230 which detects the electric charge on a TFT/LCD cell capacitor 220 is provided with a first integral circuit 232 which is added to the TFT/LCD cell capacitor 220 through a data line 218, and the data line 218 is connected to the cell capacitor 220 through a TFT 210. The TFT 210 has a source 212 connected to the cell capacitor 220 and has a drain 214 connected to a data line 218. The first gate supply voltage drives the gate of the TFT 210, and a reset circuit S3 resets the integral circuit 232. Thus, the state of each transistor is displayed, and further, the leak current and CGS of each cell are measured.