公开(公告)号：JP2002076366A

公开(公告)日：2002-03-15

申请号：JP2001170713

申请日：2001-06-06

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  PETER FRYER ,  ROBERT L WISUNIFU

IPC: G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/288 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/417 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To greatly improve the process required for manufacturing and reduce a leakage current between electrodes by forming offset regions in a multilayer film structure such as thin film transistors. SOLUTION: The multilayer film structure comprises source electrodes 14 and drain electrodes 15 formed by plating with specified spacings above an insulation substrate 11, an amorphous silicon film 16 facing the source electrodes 14 and the drain electrodes 15, a gate insulation film 17 laid on this film 16, and gate electrodes 18 laid by plating on the gate insulation film 17. The amorphous silicon film 16 and the gate insulation film 17 have offset regions 20 around the gate electrodes 18, but these regions 20 locate neither above nor below the gate electrodes 18.