公开(公告)号：US6436742B2

公开(公告)日：2002-08-20

申请号：US87136301

申请日：2001-05-31

Applicant: IBM

Inventor： MIYAMOTO TAKASHI ,  TSUJIMURA TAKATOSHI

IPC: H01L21/336 ,  H01L29/786 ,  H01L21/00 ,  H01L21/84

CPC classification number: H01L29/66765 ,  H01L29/78609 ,  H01L29/78669

Abstract: The present invention provides a thin film transistor (TFT) and a fabrication method thereof which suppresses the back channel effects in which a leakage current flows between a source electrode and a drain electrode at times during a turn off state of the TFT. A thin silicon oxynitride film 90 having a thickness preferably equal to or less than 50 Å is formed between an amorphous silicon layer 40 and a channel passivation film 50 (a silicon nitride film) above a back channel region 100 between a source electrode and a drain electrode of an inverted staggered type TFT to cause Si-O bonds to exist in an upper interface of the amorphous silicon layer. The Si-O bonds increase the Density of States in the back channel region and has an effect for suppressing the leakage current through the back channel region 100 at times during the turn off of the TFT.

Abstract translation: 本发明提供一种薄膜晶体管（TFT）及其制造方法，其抑制在TFT的关断状态期间的时间期间漏电流在源极和漏电极之间流动的反向沟道效应。 在非晶硅层40和源电极与漏极之间的背沟道区域100上方的沟道钝化膜50（氮化硅膜）之间形成厚度优选等于或小于50埃的薄氮氧化硅膜90。 反向交错型TFT的电极，使得Si-O键存在于非晶硅层的上界面。 Si-O键增加背沟道区域中的状态密度，并且具有在TFT关断期间的时间抑制通过背沟道区域100的漏电流的效果。

公开(公告)号：DE60108834T2

公开(公告)日：2006-01-19

申请号：DE60108834

申请日：2001-11-30

Applicant: IBM

Inventor： COLGAN EVAN G ,  SCHLEUPEN KAI R ,  TSUJIMURA TAKATOSHI

IPC: H01L29/786 ,  G02F1/1362 ,  G02F1/1368

Abstract: A pixel cell has a thin film transistor structure formed on a substrate. A signal conductor is patterned on the thin film transistor structure, and a first patterned layer of a transparent conductive material covers the signal conductor. The first patterned layer provides a pattern employed in etching a channel region of the thin film transistor structure. A dielectric layer is formed over the pixel cell and includes a via hole down to the first patterned layer of the transparent conductive material. A second layer of transparent conductive material extends through the via hole to contact the first patterned layer wherein the second layer is self-aligned to the transistor structure.

公开(公告)号：CA2358579C

公开(公告)日：2006-08-29

申请号：CA2358579

申请日：2001-10-05

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  SCHLEUPEN KAI R ,  COLGAN EVAN G

IPC: G02F1/1362 ,  H01L29/786 ,  G02F1/1368 ,  H01L33/00 ,  H01L49/02 ,  H05B33/12

Abstract: A pixel cell has a thin film transistor structure formed on a substrate. A signal conductor is patterned on the thin film transistor structure, and a first patterned layer of a transparent conductive material covers the signal conductor. The first patterned layer provides a pattern employed in etching a channel region of the thin film transistor structure. A dielectric layer is formed over the pixel cell and includes a via hole dow n to the first patterned layer of the transparent conductive material. A second layer of transparent conductive material extends through the via hole to contact the first patterned layer wherein the second layer is self-aligned to the transistor structure.

公开(公告)号：AU2003261602A1

公开(公告)日：2004-04-08

申请号：AU2003261602

申请日：2003-09-12

Applicant: IBM

Inventor： MIWA KOHICHI ,  TSUJIMURA TAKATOSHI ,  MOROOKA MITSUO ,  KANOH KEIGO

IPC: H01L27/32 ,  H01L51/00 ,  H01L51/30 ,  H01L51/56 ,  H05B33/14 ,  H05B33/22 ,  H05B33/12 ,  H05B33/10

Abstract: An organic light emitting diode device of the present invention comprises a substrate, a light-transmissive electrode formed on the substrate, a coating-film-formative function layer including a hole transport material and an electron transport material, the function layer being formed on the substrate, trench patterns formed on the function layer, dopant doped into the function layer between walls forming these trench patterns, and a light-reflective electrode coating the trench patterns. The dopant is introduced into the trench patterns by a capillary phenomenon, thus enabling high-definition color patterning. Moreover, the present invention provides a method for manufacturing the above-described organic light emitting diode device.

公开(公告)号：JP2003069022A

公开(公告)日：2003-03-07

申请号：JP2001246963

申请日：2001-08-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： TSUJIMURA TAKATOSHI ,  SUZUKI HIROSHI

IPC: G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  G09G3/32 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  H05B33/14

CPC classification number: G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0465 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2320/043 ,  H01L27/124 ,  H01L27/3244 ,  H01L29/6675 ,  H01L29/66772 ,  H01L29/78648

Abstract: PROBLEM TO BE SOLVED: To provide a thin-film transistor capable of controlling the gradation of an organic LED device by discretely controlling the current level, a method for manufacturing the thin-film transistor, an array substrate including the thin-film transistor, a display device and a driving system therefor. SOLUTION: This thin-film transistor includes a plurality of insulating layers 16, 24 formed on an insulating substrate 10 and on both opposite sides of the active layer 18 interposed between them, a first and a second gate electrodes 12 and 14 formed adjacent to these insulating layers 16 and 24, and wirings 38a and 38b connected to the first and the second gate electrodes 12 and 14 respectively for independently controlling the potentials of the first and the second gate electrodes 12 and 14. The area S1 of the first gate electrode 12 is different from the area S2 of the second gate electrode 14, and the current level can discretely be controlled in four levels.

Abstract translation: 要解决的问题：提供一种能够通过离散地控制电流水平来控制有机LED器件的灰度的薄膜晶体管，薄膜晶体管的制造方法，包括薄膜晶体管的阵列基板， 显示装置及其驱动系统。 解决方案：该薄膜晶体管包括形成在绝缘基板10上的多个绝缘层16,24和插在它们之间的有源层18的两个相对侧上，与这些相邻形成的第一和第二栅电极12和14 绝缘层16和24以及分别连接到第一和第二栅电极12和14的布线38a和38b，用于独立地控制第一和第二栅电极12和14的电位。第一栅电极12的区域S1 与第二栅电极14的面积S2不同，电流水平可以离散地控制在四级。

公开(公告)号：JP2001282201A

公开(公告)日：2001-10-12

申请号：JP2000099100

申请日：2000-03-31

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  MIWA KOICHI ,  SUZUKI HIROSHI

IPC: G02F1/133 ,  G09G3/20 ,  G09G3/36

Abstract: PROBLEM TO BE SOLVED: To provide a liquid crystal display device which suppresses the writing deficiency of voltage to pixels. SOLUTION: Thin-film transistors(TFTs) 10b to which scanning signals are supplied across gate lines 40 shown in Figure n-1 go on. The display signals supplied to signal line 30 shown in Figure m-1 are selected and the voltage is impressed, i.e., written to display electrodes 20 of pixels Pn. Next, the TFTs 10a supplied with the scanning signals across the gate lines 40 turn on. The display signals supplied to the signal line 30 shown in Figure m are then selected and the voltage is impressed, i.e., written to the display electrodes 20 of the pixels Pn. Namely, the structure in which the voltage is first written across the TFTs 10b in the display electrodes 20 of the pixels Pn and thereafter the voltage is written across the TFTs 10a is adopted.

公开(公告)号：JP2001051293A

公开(公告)日：2001-02-23

申请号：JP21460399

申请日：1999-07-29

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  MIYAMOTO TAKASHI ,  TOKUHIRO OSAMU ,  MOROOKA MITSUO

IPC: G09F9/30 ,  G02F1/133 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1365 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To reduce the number of necessary processes in the manufacturing processes of thin-film transistors, and also to prevent an abnormal potential from occurring by the cause of current leaking from data lines. SOLUTION: This transistor is mounted on a prescribed substrate and is also provide with a gate electrode 30 formed in a prescribed pattern, a semiconductor layer formed corresponding to the patterning of the gate electrode 30, a pixel electrode 25 formed via this semiconductor layer, and a signal electrode formed via the semiconductor layer and also arranged with a prescribed gap from the pixel electrode 25. Then, this signal electrode is arranged at such a position that crosstalk current is prevented from flowing into the pixel electrode 25 from adjacent signal lines 32b, 32c via the semiconductor layer.

公开(公告)号：CA2351568C

公开(公告)日：2004-04-27

申请号：CA2351568

申请日：1999-12-01

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  MIYAMOTO TAKASHI

IPC: G02F1/1343 ,  H01L21/3213 ,  H01L31/18 ,  H05K1/02 ,  H05K3/06 ,  H01B13/00 ,  G03F7/038 ,  G03F7/40 ,  H01L21/28 ,  H01L21/306

Abstract: To provide a process for patterning an ITO film, which is capable of preventing, for patterning an Indium-Tin-Oxide (ITO) film by using a chemically amplified resist, resist peeling or reduced adhesion even if the ITO film is exposed to a white light after resist development. An amorphous ITO film is first formed on a substrate, and a negative chemically amplified resist is directly provided on the film, exposed and. developed. In a resultant structure having a resist pattern on the amorphous ITO film, even if exposed to a white light, no resist peeling or no reduced adhesion occurs, and thus satisfactory visual inspection can be performed without adversely affecting subsequent steps. For the structure determined as a good product by visual inspection, the amorphous ITO film is etched through the resist pattern used as a mask, the resist pattern is removed, and then by heating the amorphous ITO film at the ITO crystallization temperature or higher, the crystallized ITO pattern having chemical resistance and good electrical conductivity can he obtained.

公开(公告)号：CA2351568A1

公开(公告)日：2000-06-15

申请号：CA2351568

申请日：1999-12-01

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  MIYAMOTO TAKASHI

IPC: G02F1/1343 ,  H01L21/3213 ,  H01L31/18 ,  H05K1/02 ,  H05K3/06 ,  H01B13/00 ,  G03F7/038 ,  G03F7/40 ,  H01L21/28 ,  H01L21/306

Abstract: A method for patterning an indium-tin-oxide (ITO) film by using a chemically amplified resist, causing no resist separation nor adhesion degradation even if the ITO film is exposed to white light after the resist development. An amorphous ITO film is formed on a wafer. A negative chemically amplified resist is applied directly to the ITO film, and the resist film is exposed a nd developed. The structure having a resist pattern on the amorphous ITO film i s free from resist separation and adhesion degradation even if the resist pattern is exposed to white light, and therefore the later manufacturing ste ps are not adversely affected, enabling proper visual inspection. After the structure is judged to be acceptable at the visual inspection, the amorphous ITO film is etched using the resist pattern as a mask, and then the resist pattern is removed. The ITO film is heated over the crystallization temperature of the ITO to form a crystallized ITO pattern having a chemical- resistance and a good electrical conductivity.

公开(公告)号：JP2002312104A

公开(公告)日：2002-10-25

申请号：JP2001106211

申请日：2001-04-04

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  MIWA KOICHI ,  SUZUKI HIROSHI

IPC: G06F3/02 ,  G06F1/16 ,  G06F3/023 ,  G06F3/048 ,  G09G3/20 ,  G09G3/34 ,  G06F3/00

Abstract: PROBLEM TO BE SOLVED: To make a user efficiently and accurately understand information the operation member of which the user should operate in a current process, in a laptop personal computer 25. SOLUTION: An electrophoresis display 10 is mounted on a housing surface of the laptop personal computer 25. When an event requiring the user to operate an operation member occurs, an operation member and operation information corresponding to the event are searched, and the searched operation information is displayed on a part of the electrophoresis display 10 adjacent to the searched operation member. For example, if a termination switch 69 is located at an edge in an outer surface side of a cover 28, information prompting to operate the termination switch 69 is displayed at a part of the electrophoresis display 10 in the vicinity of the termination switch 69 for the event of terminating Windows (CR).