公开(公告)号：JPH1173766A

公开(公告)日：1999-03-16

申请号：JP16885898

申请日：1998-06-16

Applicant: IBM

Inventor： BERTIN CLAUDE L ,  JOHN ATKINSON FIFIEL ,  RUSSELL JAMES HORTON ,  MILLER CHRISTOPHER P ,  WILLIAM ROBERT PATRICK TONTY

IPC: G11C11/401 ,  G11C7/14

Abstract: PROBLEM TO BE SOLVED: To improve sense characteristics of a IC memory. SOLUTION: Two bit lines whose respective bit lines have a right half and left half and plural similar memory cells connected to respective halves of respective bit lines are included in a column of an integrated memory circuit. One of memory cells connected to respective lines is used as a reference and the other cells are used for data storage. Respective halves of respective bit lines are connected to a sense node of a sense amplifier latch via independently controlled transistor switches SW1-SW4. The switch SW1 is turned on and the SW2 is turned off in order to read data from a first half of a first bit line 204. Respective switches SW3, SW4 of a second bit line 206 are turned on. Nearly same effective loads are provided in respective halves of respective bit lines 204-206. Therefore, the load applied to a first sense node 214 is the nearly half of the load applied to a second sense mode 224. The output of a memory element is selected so that a reference potential becomes the nearly middle of the potential in the half of the bit line connected to the memory element storing a high value and low value.

公开(公告)号：JP2003259625A

公开(公告)日：2003-09-12

申请号：JP2002056152

申请日：2002-03-01

Applicant: IBM

Inventor： TANAKA MASAHIRO ,  RUSSELL JAMES HORTON

IPC: H02M3/07

Abstract: PROBLEM TO BE SOLVED: To provide a charge pump circuit which improves the power factor of an output voltage in approximation to double a supply voltage. SOLUTION: The charge pump circuit 10 is provided with seventh and eighth transistors T7 and T8 between a supply terminal and first and second transistors T1 and T2. COPYRIGHT: (C)2003,JPO