公开(公告)号：JP2000003971A

公开(公告)日：2000-01-07

申请号：JP11774499

申请日：1999-04-26

Applicant: IBM

Inventor： KUMAR ARVIND ,  SANDIP TIWARY

IPC: G11C16/04 ,  B82B1/00 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a floating gate memory structure suitable to the latest device where a buried floating gate led from a back plane is used. SOLUTION: A semiconductor memory and a memory are manufactured through a method, wherein a transistor which comprises a first gate equipped with an oxide 220 and a channel 210, a second gate which comprises a floating gate 240 formed confronting the channel of the transistor, and a back plane 240 which comprises an oxide 230 formed above the back plane 240 are provided, and the thickness of the oxide 230 formed above the back plane 240 can be scaled independently of the oxide 220 of the first gate of the transistor.