公开(公告)号：JP2003078003A

公开(公告)日：2003-03-14

申请号：JP2002184179

申请日：2002-06-25

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： BEYER KLAUS ,  SCHEPIS DOMINIC

IPC: H01L29/423 ,  H01L21/336 ,  H01L21/76 ,  H01L21/762 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/66772 ,  H01L21/76264 ,  H01L21/76283 ,  H01L29/4908 ,  H01L29/78609

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a shallow trench isolation (STI) on a thin silicon-on-insulator (SOI) substrate. SOLUTION: The method includes steps of depositing a first polysilicon layer, depositing a polish stop layer on the first polysilicon layer, forming a plurality of trenches in the substrate, filling the trenches with silicon oxide, CMP polishing a first part of the silicon oxide layer until the polish stop layer, etching a second part of the silicon oxide layer under the polish stop layer as far as the above position of the first polysilicon layer, removing the polish stop layer, depositing a second polysilicon layer, and forming a polysilicon gate made up of the first and second polysilicon layers. Since well ion implantation can be carried out prior to the gate formation, sacrificial oxide growth and the exposure of STI oxide due to the removal can be prevented and an excessive recess in the STI structure can be eliminated. And seam leakage of the STI oxide caused by a polysilicon side wall present after the polysilicon gate etching can also be avoided.

Abstract translation: 要解决的问题：提供一种在薄绝缘体上硅（SOI）衬底上形成浅沟槽隔离（STI）的方法。 解决方案：该方法包括以下步骤：沉积第一多晶硅层，在第一多晶硅层上沉积抛光停止层，在衬底中形成多个沟槽，用氧化硅填充沟槽; CMP抛光氧化硅层的第一部分 直到抛光停止层，在第一多晶硅层的上述位置刻蚀抛光停止层下方的氧化硅层的第二部分，去除抛光停止层，沉积第二多晶硅层，并形成多晶硅栅极 第一和第二多晶硅层。 由于可以在栅极形成之前进行良好的离子注入，所以可以防止由去除引起的牺牲氧化物生长和STI氧化物的暴露，并且可以消除STI结构中的过度凹陷。 并且也可以避免在多晶硅栅极蚀刻之后存在的多晶硅侧壁引起的STI氧化物的焊缝泄漏。

公开(公告)号：GB2346260A

公开(公告)日：2000-08-02

申请号：GB0001370

申请日：2000-01-24

Applicant: IBM

Inventor： AJMERA ATUL ,  LEOBANDUNG EFFENDI ,  RAUSCH WERNER ,  SCHEPIS DOMINIC ,  SHAHIDI GHAVAM G

IPC: H01L27/12 ,  H01L21/74 ,  H01L21/76 ,  H01L21/762 ,  H01L23/52 ,  H01L23/58 ,  H01L29/786

Abstract: A method of forming a contact to the substrate 3 of a silicon-on-insulator semiconductor device comprises forming an isolation trench (11, Fig 2) in the silicon layer 7, filling the trench with TEOS and forming a contact trench through the isolation trench such that the contact trench makes contact with the underlying substrate 3. The contact trench is filled with polysilicon 21 or tungsten and may be ring shaped to form a guard ring. The contact trench may be used to ground the substrate.

公开(公告)号：GB2346260B

公开(公告)日：2004-01-28

申请号：GB0001370

申请日：2000-01-24

Applicant: IBM

Inventor： AJMERA ATUL ,  LEOBANDUNG EFFENDI ,  RAUSCH WERNER ,  SCHEPIS DOMINIC ,  SHAHIDI GHAVAM G

IPC: H01L27/12 ,  H01L21/74 ,  H01L21/76 ,  H01L21/762 ,  H01L23/52 ,  H01L23/58 ,  H01L29/786

Abstract: A method for forming a substrate contact in a substrate that includes a silicon on insulator region. A shallow isolation trench is formed in the silicon on insulator substrate. The shallow isolation trench is filled. Photoresist is deposited on the substrate. A contact trench is formed in the substrate through the filled shallow isolation trench, silicon on insulator, and silicon substrate underlying the silicon on insulator region. The contact trench is filled, wherein the material filling the contact trench forms a contact to the silicon substrate.