BUS MASTER INTERFACE CIRCUIT WITH TRANSPARENT PREEMPTION OF A DATA TRANSFER OPERATION.

    公开(公告)号:MY104505A

    公开(公告)日:1994-04-30

    申请号:MYPI19901890

    申请日:1990-10-29

    Applicant: IBM

    Abstract: A PLURALITY OF SPECIALIZED CONTROLLERS (E.G., 202, 204& 206), EACH ONE ADAPTED TO CONTROL A PARTICULAR TYPE OF DATA TRANSFER OPERATION, CONTROL THE FLOW OF DATA BETWEEN A SYSTEM BUS (104) AND A LOCAL BUS (106) ON A COMPUTER ADAPTER CARD (102). WHEN THE DIRECT MEMORY ACCESS (DMA) CONTROLLER (202) IS CONTROLLING A DMA OPERATION ON THE LOCAL BUS, CERTAIN OTHER CONTROLLERS (204 & 206) CAN BREAK-IN TO THE CURRENT DMA OPERATION, TEMPORARILY HALTING THE DMA OPERATION UNTIL THE OTHER CONTROLLER HAS COMPLETED ITS DATA TRANSFER OPERATION.TO BREAK IN TO A DMA OPERATION, HANDSHAKING SIGNALS THE DMA CONTROLLER AND THE LOCAL BUS INTERFACE CIRCUIT (212) ARE TEMPORARILY BLOCKED BY BLOCKING SIGNALS FROM A BREAK-IN LOGIC CIRCUIT (210). THE BREAK-IN CIRCUIT INCLUDES A FOUR-STATE MACHINE TO BLOCK THE HANDSHAKING SIGNALS AT THE APPROPRIATE TIMES, AND TO SIGNAL THE INTERRUPTING CONTROLLER TO BEGIN ITS DATA TRANSFER OPERATION. WHEN BREAKING-IN TO A DMA OPERATION IN THIS MANNER, THE OPERATION OF THE DMA CONTROLLER IS NOT ALTERED, INSTEAD, TO THE DMA CONTROLLER, IT APPEARS THAT THE LOCAL BUS INTERFACE CIRCUIT IS MERELY SLOW TO RESPOND WITH ITS ACKNOWLEDGE HANDSHAKE.(FIG. 2)

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