Extending range of lithographic simulation integral
    2.
    发明专利
    Extending range of lithographic simulation integral 有权
    扩展的平面模拟集成范围

    公开(公告)号:JP2005128557A

    公开(公告)日:2005-05-19

    申请号:JP2004310633

    申请日:2004-10-26

    CPC classification number: G03F1/36 G03F1/70

    Abstract: PROBLEM TO BE SOLVED: To provide a method for calculating intermediate-range and long-range image contributions from mask polygons.
    SOLUTION: An algorithm is introduced having application to optical proximity correction in optical lithography. A finite integral for each sector of a polygon replaces an infinite integral. A finite integral is achieved by integrating over two triangles instead of integrating on full sectors. An analytical approach is presented for a power law kernel to reduce the numerical integration of a sector to an analytical expression evaluation. The mask polygon is divided into a plurality of regions to calculate effects of interaction such as intermediate-range and long-range effects, by truncating the mask instead of truncating the kernel function.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种用于从掩模多边形计算中间范围和远程图像贡献的方法。 解决方案:引入了一种应用于光学光刻中的光学邻近校正的算法。 多边形的每个扇区的有限积分代替无限积分。 通过对两个三角形进行积分而不是整个扇区进行积分来实现有限积分。 针对幂律内核提出了一种分析方法,以减少一个部门与分析表达式评估的数值整合。 掩模多边形被划分成多个区域,以通过截断掩码而不是截断核函数来计算诸如中间范围和长距离效应的交互的效果。 版权所有(C)2005,JPO&NCIPI

    Simultaneous computation of a plurality of points on one or more cut lines
    3.
    发明专利
    Simultaneous computation of a plurality of points on one or more cut lines 有权
    同时计算一个或多个切割线上的多个点

    公开(公告)号:JP2005129958A

    公开(公告)日:2005-05-19

    申请号:JP2004309629

    申请日:2004-10-25

    CPC classification number: G03F1/36

    Abstract: PROBLEM TO BE SOLVED: To provide a method and a program storage device in which model base optical proximity collection is performed, by providing a region of interest (ROI) having interaction distance and tracing at least one polygon in the ROI.
    SOLUTION: A cut line or a plurality of cut lines of sample points showing a set of apexes are formed within the ROI so as to be traversed at least one side edge of polygon. By determining an angular position, and a first part and a second part of the cut line in opposing side surfaces which intersect between the cut line and the side edge of the polygon, and then, based on the angular position and the first part and the second part of the cut line extending the original ROI over the interaction distance, new ROI is formed. By this form, various new ROI is formed in various different directions. Finally, optical proximity can be corrected.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种方法和程序存储装置,其中通过提供具有交互距离的感兴趣区域(ROI)和跟踪ROI中的至少一个多边形来执行模型基础光学邻近度收集。 解决方案:在ROI内形成切割线或多个示出点的切割线的切割线,以便遍历多边形的至少一个侧边缘。 通过确定角位置,以及在切割线和多边形的侧边之间相交的相对侧表面中的切割线的第一部分和第二部分,然后基于角位置和第一部分以及 切割线的第二部分通过交互距离延伸原始ROI,形成新的ROI。 通过这种形式,在各种不同的方向上形成各种新的ROI。 最后,可以校正光学接近度。 版权所有(C)2005,JPO&NCIPI

    Renesting interaction map into design for efficient long range calculation
    4.
    发明专利
    Renesting interaction map into design for efficient long range calculation 有权
    将交互地图重新设计成有效的长距离计算

    公开(公告)号:JP2005128553A

    公开(公告)日:2005-05-19

    申请号:JP2004309697

    申请日:2004-10-25

    CPC classification number: G03F1/36 G03F1/68 G06F17/5068

    Abstract: PROBLEM TO BE SOLVED: To provide a method for performing model-based photolithography correction by partitioning a cell array layout having a plurality of polygons into a plurality of cells covering the layout, and to provide a program storage device.
    SOLUTION: The layout is representative of a desired design data hierarchy. A density map is generated corresponding to interactions between the polygons and the plurality of cells, and then the densities within each cell are convolved. An interaction map is formed by using the convolved densities, followed by truncating the interaction map to form a map of truncated cells. Substantially identical groupings of the truncated cells are segregated respectively into differing ones of a plurality of buckets. Each bucket contains a single set of identical groupings of truncated cells. A hierarchal arrangement is generated using the buckets, and the desired design data hierarchy is performed by using the hierarchal arrangement to ultimately correct for photolithography.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种通过将具有多个多边形的单元阵列布局分割成覆盖布局的多个单元来执行基于模型的光刻校正的方法,并且提供程序存储装置。

    解决方案:布局代表所需的设计数据层次结构。 生成对应于多边形与多个单元之间的相互作用的密度图,然后卷积每个单元内的密度。 通过使用卷积密度形成交互图,随后截断交互图以形成截断单元格的图。 截短的细胞的基本相同的分组分别分离成多个桶中的不同的桶。 每个桶包含一组相同的截断单元组。 使用桶来生成层级布置,并且通过使用层级布置来执行期望的设计数据层次结构以最终校正光刻。 版权所有(C)2005,JPO&NCIPI

    INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS
    5.
    发明申请
    INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS 审中-公开
    用于片上微波应用的集成电路变压器设备

    公开(公告)号:WO2006110207A2

    公开(公告)日:2006-10-19

    申请号:PCT/US2006005013

    申请日:2006-02-10

    Abstract: Methods are provided for building integrated circuit transformer devices having compact universal and scalable architectures for millimeter wave applications. For example, an integrated circuit transformer (22) is formed on a semiconductor substrate (21) and includes a ground shield (23) formed on the substrate (21), a primary conductor (24) comprising an elongated conductive strip and a secondary conductor (25) comprising an elongated conductive strip. The primary conductor (24) and the secondary conductor (25) are aligned to form a coupled-wire structure that is disposed adjacent to the ground shield (23). The ground shield (23) comprises a pattern of close-ended parallel elongated slots (23a) and parallel conductive strips (23b) that are commonly connected at end portions thereof along edge regions (23c) of the ground shield (23). The slots (23a) and strips (23b) are disposed orthogonal to the primary (24) and secondary (25) conductors. The edge regions (23c) provide current return paths that are collinear to the primary (24) and secondary (25) conductors. The integrated circuit transformer (22) can be used as template or building block, which is parameterized by length, for constructing various integrated circuit devices and modular structures including, but not limited to, power amplifiers, n:l impendence transformers, and power combiners.

    Abstract translation: 提供了用于构建具有用于毫米波应用的紧凑通用和可扩展架构的集成电路变压器设备的方法。 例如,集成电路变压器(22)形成在半导体衬底(21)上并且包括形成在衬底(21)上的接地屏蔽(23),包括细长导电条和次级导体 (25)包括细长导电条。 主导体(24)和次级导体(25)被对准以形成邻近接地屏蔽(23)设置的耦合线结构。 接地屏蔽(23)包括在接地屏蔽(23)的边缘区域(23c)处在其端部共同连接的近端平行细长槽(23a)和平行导电条(23b)的图案。 槽(23a)和条(23b)与主(24)和次(25)导体正交设置。 边缘区域(23c)提供与初级(24)和次级(25)导体共线的电流返回路径。 集成电路变压器(22)可以用作模板或构件块,其长度参数化,用于构建各种集成电路装置和模块化结构,包括但不限于功率放大器,n阻抗变压器和功率组合器 。

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