公开(公告)号：GB2511274A

公开(公告)日：2014-09-03

申请号：GB201204881

申请日：2012-03-21

Applicant: IBM

Inventor： RUDRUD PAUL ,  KIM KYU-HYOUN ,  SLOAT JACOB

IPC: G06F13/16

Abstract: Correcting duty cycle distortion of data query strobes 172, DQS, signals between memory controller 150 and bursting memory 151 (double data rate DDR memory) by determining a duty cycle correction factor to apply to differential DQS signals. Duty cycle correction module 202 sets the correction factor in register 205. The module can be in DQS channel and the factor is applied: after transmit logic 104 before DQS signal is sent to controller driver 206; before receive logic after DQS signal is received from memory. DQS signals comprise read operations and the correcting factor comprises applying: offset voltages; or two adjustable phase shifters to each of two differential DQS signal. The factor is determined by measuring data eyes for settings between minimum and maximum setting. A delay can be added to rising and falling edges of DQS signals.