公开(公告)号：WO2004102405A3

公开(公告)日：2005-03-24

申请号：PCT/GB2004001910

申请日：2004-05-04

Applicant: IBM ,  IBM UK ,  CHEN JAMES ,  KUO LIH-CHUNG ,  SPANEL CAROL ,  WALLS ANDREW DALE

Inventor： CHEN JAMES ,  KUO LIH-CHUNG ,  SPANEL CAROL ,  WALLS ANDREW DALE

IPC: G06F13/38

CPC classification number: G06F13/385

Abstract: A method, apparatus and program storage device for automatically presenting status from a host bus adapter until an error is detected is provided. The host bus adapter transmits data to a host. The host performs data transmission validation and determines whether data transmission was successful. The host bus adapter automatically sends status information when data transmission was successful, else the host bus adapter waits for status type identification from the host for transmission of data.

Abstract translation: 提供一种用于自动呈现来自主机总线适配器的状态直到检测到错误的方法，装置和程序存储装置。 主机总线适配器向主机发送数据。 主机执行数据传输验证，并确定数据传输是否成功。 主机总线适配器在数据传输成功时自动发送状态信息，否则主机总线适配器等待来自主机的数据传输的状态类型识别。

公开(公告)号：WO2008128990A3

公开(公告)日：2009-01-15

申请号：PCT/EP2008054722

申请日：2008-04-18

Applicant: IBM ,  IBM UK ,  SPANEL CAROL ,  WALLS ANDREW DALE ,  SONG CHENG-CHUNG ,  BLINICK STEPHEN

Inventor： SPANEL CAROL ,  WALLS ANDREW DALE ,  SONG CHENG-CHUNG ,  BLINICK STEPHEN

IPC: G06F11/20

CPC classification number: G06F11/2038 ,  G06F11/2033 ,  G06F11/2046

Abstract: An apparatus, system, and method are disclosed for adapter card failover. A switch module connects a first processor complex to an adapter card through a first port as an owner processor complex. The owner processor complex manages the adapter card except for a second port and receives error messages from the adapter card. The switch module further connects a second processor complex to the adapter card through the second port as a non-owner processor complex. The non-owner processor complex manages the second port. A detection module detects a failure of the first processor complex. A setup module modifies the switch module to logically connect the second processor complex to the adapter card as the owner processor complex and to logically disconnect the first processor complex from the adapter card in response to detecting the failure.

Abstract translation: 公开了用于适配器卡故障切换的装置，系统和方法。 开关模块通过作为所有者处理器的第一端口将第一处理器复合体连接到适配器卡。 所有者处理器复合体管理适配器卡，除了第二个端口，并从适配器卡接收错误消息。 交换机模块通过第二端口进一步将第二处理器复合体连接到适配器卡，作为非所有者处理器复合体。 非所有者处理器复合体管理第二个端口。 检测模块检测第一处理器复杂的故障。 设置模块修改交换机模块以将所有者处理器复杂化，将第二处理器复合体逻辑连接到适配器卡，并根据检测到故障从逻辑上断开第一个处理器复合体与适配器卡的连接。

公开(公告)号：AT372553T

公开(公告)日：2007-09-15

申请号：AT04731047

申请日：2004-05-04

Applicant: IBM

Inventor： CHEN JAMES ,  KUO LIH-CHUNG ,  SPANEL CAROL ,  WALLS ANDREW

IPC: G06F13/38

Abstract: A method, apparatus and program storage device for automatically presenting status from a host bus adapter until an error is detected is provided. Data is transmitted between the host bus adapter and a host. The host performs data transmission validation and determines whether data transmission was successful. The host bus adapter automatically sends status information when data transmission was successful, else the host bus adapter waits for status type identification from the host for transmission of data.

公开(公告)号：DE602004008768T2

公开(公告)日：2008-06-12

申请号：DE602004008768

申请日：2004-05-04

Applicant: IBM

Inventor： CHEN JAMES ,  KUO LIH-CHUNG ,  SPANEL CAROL ,  WALLS ANDREW DALE

IPC: G06F13/38

Abstract: A method, apparatus and program storage device for automatically presenting status from a host bus adapter until an error is detected is provided. Data is transmitted between the host bus adapter and a host. The host performs data transmission validation and determines whether data transmission was successful. The host bus adapter automatically sends status information when data transmission was successful, else the host bus adapter waits for status type identification from the host for transmission of data.

公开(公告)号：DE602004008768D1

公开(公告)日：2007-10-18

申请号：DE602004008768

申请日：2004-05-04

Applicant: IBM

Inventor： CHEN JAMES ,  KUO LIH-CHUNG ,  SPANEL CAROL ,  WALLS ANDREW DALE

IPC: G06F13/38

Abstract: A method, apparatus and program storage device for automatically presenting status from a host bus adapter until an error is detected is provided. Data is transmitted between the host bus adapter and a host. The host performs data transmission validation and determines whether data transmission was successful. The host bus adapter automatically sends status information when data transmission was successful, else the host bus adapter waits for status type identification from the host for transmission of data.