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公开(公告)号：DE69326935D1
公开(公告)日：1999-12-09
申请号：DE69326935
申请日：1993-03-02
Applicant: IBM
Inventor： LE PENNEC JEAN-FRANCOIS , MICHEL PATRICK , SICSIC PATRICK , SPATARI JOSEPH
Abstract: The method involves the steps of establishing on request of a first DTE to a second remote DTE a set of n independent digital communication channels between said terminal adapters, and determining during an initialization phase the relationship between the slot of each channel used for the building of said aggregation superchannel and the chronologic order of the establishment of the considered slot. Then, the high-rate data flow is splitted and each byte is transmitted through the independent digital channels in accordance with the chronologic order which was previously assigned to each of the said channels. In the remote DTE, each byte of the splitted high-rate data flow are received through the different independent digital channels and are loaded in a single memory at an address which is computed from the following formula: A(n)= A(n-1) + n Where A(n-1) corresponds to the address in which is stored the preceding byte conveyed through the considered channel, and n corresponds to the number of digital channels established. Therefore, each channel works independently and there is no need to measure any delay between the channels. The memory storage will contain at continuous addresses the high-rate data flow. Applied to a ISDN, fractional T1 or multi-channel E1, the method provides an aggregate link operating a nx64 kpbs.
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公开(公告)号：DE69326935T2
公开(公告)日：2000-05-18
申请号：DE69326935
申请日：1993-03-02
Applicant: IBM
Inventor： LE PENNEC JEAN-FRANCOIS , MICHEL PATRICK , SICSIC PATRICK , SPATARI JOSEPH
Abstract: The method involves the steps of establishing on request of a first DTE to a second remote DTE a set of n independent digital communication channels between said terminal adapters, and determining during an initialization phase the relationship between the slot of each channel used for the building of said aggregation superchannel and the chronologic order of the establishment of the considered slot. Then, the high-rate data flow is splitted and each byte is transmitted through the independent digital channels in accordance with the chronologic order which was previously assigned to each of the said channels. In the remote DTE, each byte of the splitted high-rate data flow are received through the different independent digital channels and are loaded in a single memory at an address which is computed from the following formula: A(n)= A(n-1) + n Where A(n-1) corresponds to the address in which is stored the preceding byte conveyed through the considered channel, and n corresponds to the number of digital channels established. Therefore, each channel works independently and there is no need to measure any delay between the channels. The memory storage will contain at continuous addresses the high-rate data flow. Applied to a ISDN, fractional T1 or multi-channel E1, the method provides an aggregate link operating a nx64 kpbs.
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