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公开(公告)号：WO0206942A3
公开(公告)日：2002-10-10
申请号：PCT/EP0107268
申请日：2001-06-26
Applicant: IBM , IBM FRANCE
Inventor： BENAYOUN ALAIN , MICHEL PATRICK , TOUBOL GILLES
IPC: G06F13/10 , G06F3/0354 , G06F3/038 , G06F3/033
CPC classification number: G06F3/038 , G06F3/0383 , G06F2203/0384
Abstract: A system for establishing wireless connection between a peripheral device and an intelligent device in a multi-computers environment having a plurality of intelligent devices, is disclosed. The system is in part included within the peripheral device which is preferably a mouse device and also is included within the intelligent device which is preferably a computer system. Specific routines of the system allow a user to work with any of the intelligent devices using only the one mouse device.
Abstract translation: 公开了一种用于在具有多个智能设备的多计算机环境中的外围设备和智能设备之间建立无线连接的系统。 该系统部分包含在外围设备中，该外围设备优选是鼠标设备，并且还包括在优选为计算机系统的智能设备内。 系统的特定例行程序允许用户仅使用一个鼠标设备来使用任何智能设备。
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公开(公告)号：JPH01122211A
公开(公告)日：1989-05-15
申请号：JP20030888
申请日：1988-08-12
Applicant: IBM
Inventor： CUKIER MAURICE , MARCIANO FREDERIK , MICHEL PATRICK
Abstract: PURPOSE: To evade the offset of an analog output by correcting the offset at the time of correcting PLO so that a clock for controlling the input of a digital word to a sigma/delta converter is slowed down or speeded up. CONSTITUTION: A state A is held until the slow-down operation SD or speed-up operation SU of the PLO is executed. When the speed-up operation SU is executed, the system is changed from the state A to a state B at a succeeding crystal oscillator pulse. Then the system is advanced to a state C or a state D in accordance with a result that a sigma/delta bit is a '1' bit or a '0' bit. When the polarity of sigma/delta data is changed, the state is immediately changed from C to E (or D to E). The state E expresses that the generation of a correction pulse is possible. Then the system is returned to the state A waiting for new PLO correction. When the PLO slow-down operation SD is executed, the system directly changed from the state A to the state E for generating a correction pulse.
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公开(公告)号：JP2000353089A
公开(公告)日：2000-12-19
申请号：JP2000162612
申请日：2000-05-31
Applicant: IBM
Inventor： BENAYOUN ALAIN , LE PENNEC JEAN-FRANCOIS , PIN CLAUDE , MICHEL PATRICK
Abstract: PROBLEM TO BE SOLVED: To provide a hardware device which better responds to the necessity of each program, can use a simple instruction when necessary and processes an instruction set that can use more complicated instruction than adaptable to a basic instruction sequence used most frequently. SOLUTION: This device is a hardware device which processes in parallel a decided instruction out of a programmable instruction set that shares a format and has an instruction code field defining an execution step of an instruction corresponding to execution of a microinstruction. In this case, judgment blocks (12 to 20) each of which is associated with a specific instruction of a programmable instruction set and only one of which is selected by a decision instruction in order to define a specific microinstruction to be processed for executing a decided instruction, activation blocks (22 to 30) each of which is associated with the judgment blocks, executes the specific microinstruction and only one of which associated with the selected judgment block is activated and executes the specific microinstruction, and a microinstruction selection block 46 which is connected to each of the activation blocks and selects the specific microinstruction to be executed.
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公开(公告)号：DE60141275D1
公开(公告)日：2010-03-25
申请号：DE60141275
申请日：2001-06-26
Applicant: IBM , IBM FRANCE
Inventor： BENAYOUN ALAIN , MICHEL PATRICK , TOUBOL GILLES
IPC: G06F13/10 , G06F3/0354 , G06F3/038
Abstract: A system for establishing wireless connection between a peripheral device and an intelligent device in a multi-computer environment having a plurality of intelligent devices is disclosed. The system is in part included within the peripheral device which is preferably a mouse device and also is included within the intelligent device which is preferably a computer system. Specific routines of the system allow a user to work with any of the intelligent devices using only the one mouse device.
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公开(公告)号：AT457488T
公开(公告)日：2010-02-15
申请号：AT01957891
申请日：2001-06-26
Applicant: IBM
Inventor： BENAYOUN ALAIN , MICHEL PATRICK , TOUBOL GILLES
IPC: G06F13/10 , G06F3/0354 , G06F3/038
Abstract: A system for establishing wireless connection between a peripheral device and an intelligent device in a multi-computer environment having a plurality of intelligent devices is disclosed. The system is in part included within the peripheral device which is preferably a mouse device and also is included within the intelligent device which is preferably a computer system. Specific routines of the system allow a user to work with any of the intelligent devices using only the one mouse device.
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Patent Agency Ranking
公开(公告)号：FR2799288B1
公开(公告)日：2005-02-25
申请号：FR0009166
申请日：2000-07-13
Applicant: IBM
Inventor： MICHEL PATRICK , BENAYOUN ALAIN , ALBANO ANDRE , LE PENNEC JEAN FRANCOIS
Abstract: The invention relates to a Universal Serial Bus (USB) with two wireless communication hubs (USB hubs). One of these hubs is connected to a first host computer, and both USB hubs are connected to a plurality of I/O devices. Each USB hub includes a wireless adapter and an antenna connected to the wireless adapter. The wireless adapter of each USB hub comprises a transmitting/receiving unit for transmitting data via the antenna to the wireless adapter of the other USB hub or receiving data via the antenna from the wireless adapter of the other USB hub. The wireless adapter also comprises a wireless dual port, which is automatically configured upstream or downstream when the first host computer is connected to one of the USB hubs.
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公开(公告)号：FR2794259B1
公开(公告)日：2002-02-22
申请号：FR0006085
申请日：2000-05-12
Applicant: IBM
Inventor： BENAYOUN ALAIN , MICHEL PATRICK , LE PENNEC JEAN FRANCOIS , PIN CLAUDE
Abstract: The present invention is directed to a hardware device for parallel processing a determined instruction of a set of programmable instructions having a same format with an operand field defining the execution steps of the instruction corresponding to the execution of micro-instructions, comprising decision blocks (12-20) being each associated with a specific instruction of the set of programmable instructions, only one decision block being selected by the determined instruction in order to define which are the specific micro-instructions to be processed for executing the determined instruction, activation blocks (22-30) respectively associated with the decision blocks for running one or several specific micro-instructions, only the activation block associated with said selected decision block being activated to run the specific micro-instructions, and a micro-instruction selection block (46) connected to each activation block for selecting the specific micro-instructions to be executed.
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公开(公告)号：FR2811787A1
公开(公告)日：2002-01-18
申请号：FR0105479
申请日：2001-04-24
Applicant: IBM CORP INTERNAT BUSINESS MAC
Inventor： FIESCHI JACQUES , MICHEL PATRICK , LE PENNEC JEAN FRANCOIS , ROY PASCAL
Abstract: A PIN code input by a buyer (10) to an electronic payment center is determined whether it corresponds to a predetermined number in the credit card provided by the buyer to a seller terminal (12). The center checks with specified user of mobile phone whether the PIN code is valid, if it corresponds to the predetermined number. An Independent claim is also included for system to validate an electronic payment by a credit card.
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公开(公告)号：FR2803672A1
公开(公告)日：2001-07-13
申请号：FR0014658
申请日：2000-11-14
Applicant: IBM
Inventor： BENAYOUN ALAIN , MICHEL PATRICK , LE PENNEC JEAN FRANCOIS , PIN CLAUDE
Abstract: The double access memory serves as a buffer between the web download and the local hard disc. The system provides transfer of files of data from a web server to a client work station via a network and vice versa. The client work station comprises a hard disc (205) for recording the file of data transferred via a SCSI bus (208). The client work station comprises a double access memory (304) for provisionally holding the file of data. A network logic unit (302) is interconnected between the network and the input port of the memory. A SCSI logic unit (303) is interconnected between the output port of the double access memory and the SCSI bus for transferring the data file from the double access memory to the hard disc, via the SCSI bus, and vice versa.
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公开(公告)号：DE3780640T2
公开(公告)日：1993-03-11
申请号：DE3780640
申请日：1987-10-19
Applicant: IBM
Inventor： CUKIER MAURICE , MARCIANO FREDERIK , MICHEL PATRICK
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