公开(公告)号：GB2585514B

公开(公告)日：2021-05-19

申请号：GB202012499

申请日：2019-01-15

Applicant: IBM

Inventor： KEVIN MCILVAIN ,  STEPHEN GLANCY ,  WARREN MAULE ,  KYU-HYOUN KIM

IPC: G11C29/42 ,  G06F11/10 ,  G11C29/44 ,  G11C29/52

Abstract: A memory system for storing data is disclosed, the memory system including a plurality of memory devices configured to store data, each memory device having a plurality of bits, the memory devices configured and associated to work together as a rank to respond to a request; a memory control circuit associated with the plurality of memory devices and configured to output command and control signals to the plurality of memory devices; a detector for detecting a bit error in an operation; and a controller for remapping the bit error to a spare bit lane in response to the detector detecting the bit error.

公开(公告)号：GB2585514A

公开(公告)日：2021-01-13

申请号：GB202012499

申请日：2019-01-15

Applicant: IBM

Inventor： KEVIN MCILVAIN ,  STEPHEN GLANCY ,  WARREN MAULE ,  KYU-HYOUN KIM

IPC: G11C29/42 ,  G06F11/10 ,  G11C29/44 ,  G11C29/52

Abstract: A memory system for storing data is disclosed, the memory system including a plurality of memory devices configured to store data, each memory device having a plurality of bits, the memory devices configured and associated to work together as a rank to respond to a request; a memory control circuit associated with the plurality of memory devices and configured to output command and control signals to the plurality of memory devices; a detector for detecting a bit error in an operation; and a controller for remapping the bit error to a spare bit lane in response to the detector detecting the bit error.