Efficient and selective sparing of bits in memory systems

    公开(公告)号:GB2585514B

    公开(公告)日:2021-05-19

    申请号:GB202012499

    申请日:2019-01-15

    Applicant: IBM

    Abstract: A memory system for storing data is disclosed, the memory system including a plurality of memory devices configured to store data, each memory device having a plurality of bits, the memory devices configured and associated to work together as a rank to respond to a request; a memory control circuit associated with the plurality of memory devices and configured to output command and control signals to the plurality of memory devices; a detector for detecting a bit error in an operation; and a controller for remapping the bit error to a spare bit lane in response to the detector detecting the bit error.

    Efficient and selective sparing of bits in memory systems

    公开(公告)号:GB2585514A

    公开(公告)日:2021-01-13

    申请号:GB202012499

    申请日:2019-01-15

    Applicant: IBM

    Abstract: A memory system for storing data is disclosed, the memory system including a plurality of memory devices configured to store data, each memory device having a plurality of bits, the memory devices configured and associated to work together as a rank to respond to a request; a memory control circuit associated with the plurality of memory devices and configured to output command and control signals to the plurality of memory devices; a detector for detecting a bit error in an operation; and a controller for remapping the bit error to a spare bit lane in response to the detector detecting the bit error.

    Method and apparatus for securing memory modules

    公开(公告)号:GB2611729B

    公开(公告)日:2025-04-02

    申请号:GB202301413

    申请日:2021-06-01

    Applicant: IBM

    Abstract: A memory system for storing data that includes providing a memory module having one or more memory devices and a voltage regulator for controlling voltage levels supplied to the one or more memory devices, wherein the voltage regulator has a first state that permits write and read operations with the one or more memory devices, and a second state where the voltage regulator prevents at least read operations with the one or more memory devices the system configured to store an encryption key in ROM on the voltage regulator; copy the encryption key value from the ROM to a voltage regulator register; set a voltage regulator encryption timer for a period of time; and transition the voltage regulator to the second state in response to the voltage regulator encryption timer expiring.

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