Sense, store and interlock matrix circuit for a switching device
    2.
    发明授权
    Sense, store and interlock matrix circuit for a switching device 失效
    用于切换设备的感知,存储和互锁矩阵电路

    公开(公告)号:US3582892A

    公开(公告)日:1971-06-01

    申请号:US3582892D

    申请日:1968-10-29

    Applicant: IBM

    CPC classification number: H03M11/02 G06K15/10

    Abstract: A circuit is provided which operates in combination with a matrix switch. The circuit senses a switch closure, stores a pair of output signals representative of the closed switch, cancels the effect of a second switch closure or multiple switch closure during the storage period and resets at the end of the storage period. The circuit includes a plurality of transistor latching means connected to the matrix switch, pairs of which are set by switch closures. Clamping diodes are provided to balance the latching means to prevent spontaneous setting. A switch interlock transistor is included to prevent any subsequent switch closures prior to reset from producing an output signal. A transistor arrangement is also included to cancel the output signals when two or more switches are erroneously closed at the same time. At the end of a selected time period, reset transistors are actuated to reset the circuit to its original state.

    Alphanumeric parallel tone, sequential character system, method, and apparatus
    4.
    发明授权
    Alphanumeric parallel tone, sequential character system, method, and apparatus 失效
    ALPHANUMER PARALLEL TONE,顺序字符系统,方法和装置

    公开(公告)号:US3582895A

    公开(公告)日:1971-06-01

    申请号:US3582895D

    申请日:1969-01-15

    Applicant: IBM

    CPC classification number: H04L27/30

    Abstract: An alphanumeric system, method, and apparatus includes a parallel tone transmitter, a parallel tone receiver, each having a conventional telephone frequency type of A and B or parallel tone oscillators, and a splitter of tones from the receiver. An A tone will last for an interval long enough to assure protection against response to spurious tones such as voice signals, but may change frequency during the character period. When the A tone is constant during a complete character period, the B tone will not last as long as the A tone, but will change frequency after a set interval, for an A-B-B sequential, alphanumeric code, during the character period for each character. Alternatively, both the A and B tones are changed to provide an A-A-B-B sequential code for each character. The audio tones employed are standard, avoid intermodulation error, and the system maintains voice protection, while increasing the number of alphanumeric characters for a period of fixed length.

    PARALLEL TONE MULTIPLEXER-RECEIVER

    公开(公告)号:CA1010543A

    公开(公告)日:1977-05-17

    申请号:CA174799

    申请日:1973-06-22

    Applicant: IBM

    Abstract: Parallel tone signals received on a plurality of input lines are digitized. Specific tone combinations represent different data, such as a particular digit or character. A received signal is considered a valid data signal if it is of at least a predetermined minimum time duration. The digitized signals are read into individual shift registers for each line. The length of each shift register is sufficient to store two data signals, each of the predetermined minimum valid time duration. The tone signals received on the input lines are asynchronous and of variable time duration. A multiplexer sequentially reads out the storage registers at a rate which is relatively high compared to the rate at which the digitized signals are entered into the registers. The time-division-multiplexed serial samples from all registers are reconverted to the input tone signals, frequency separated and detected in a multi-frequency receiver, and then applied to a demultiplexer so that the detected signals appear on a plurality of output lines corresponding to the plurality of input lines. Even though each register is completely read out during each sample time by the multiplexer, the last half of the signal stored in a register is recirculated back into the register to be read out as the first half of the register's contents the next time the line is sampled by the multiplexer, thereby eliminating the possibility of the loss of a digit or character during the multiplexing process.

    WRITING AND ERASING IN AC PLASMA DISPLAYS

    公开(公告)号:CA1087768A

    公开(公告)日:1980-10-14

    申请号:CA287498

    申请日:1977-09-26

    Applicant: IBM

    Abstract: IMPROVED WRITING AND ERASING IN AC PLASMA DISPLAYS Improved writing and erasing in AC gas discharge display panels is obtained by applying a special normalizing voltage waveform to cause the cells to be in a more standardized state, so that the applied writing and erasing pulses act to cause wall voltage changes which are less sensitive to the cell's recent history. The special normalizing waveform is applied adjacent to the erase pulse and/or to the write pulse and acts to fire the cells in a manner such that there is no loss in the memory state of the cells.

    10.
    发明专利
    未知

    公开(公告)号:FR2361738A1

    公开(公告)日:1978-03-10

    申请号:FR7721586

    申请日:1977-07-07

    Applicant: IBM

    Abstract: A nondestructive, transparent cursor for AC plasma displays may be superimposed electronically over a displayed image without regenerating the original image each time the cursor is moved. The cursor is displayed by means of a special cursor drive waveform which discharges both previously "on" and "off" cells which form the cursor but permits reversion of the cells to their original state when the cursor drive waveform is removed and the normal sustaining waveform is restored.

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