公开(公告)号：JPH08123661A

公开(公告)日：1996-05-17

申请号：JP22873795

申请日：1995-09-06

Applicant: IBM

Inventor： BAABARA ARAN CHIYATSUPERU ,  TERII AIBUAN CHIYATSUPERU ,  BURUUSU MAATEIN FUREISHIYAA ,  SUTANREI EBUARETSUTO SHIYUUSUT

IPC: G06F7/04 ,  G06F7/02

Abstract: PROBLEM TO BE SOLVED: To provide a comparator circuit which can operate with reliability with the small number of stages. SOLUTION: The high-speed comparator circuit is provided with plural first switches XOR operating in parallel. First and second data words are inputted to the first switches. When the data words are matched, a first logic state output is given. When they are not matched, a second logic state output is given. The plural second switches receive the logic state outputs and give combined outputs showing that the whole words are matched or they are not matched to first switches 82 and 84. The third switches are connected to first and second branch nodes 44 and 46, generate a first voltage difference between the first and second branch nodes when the whole words are matched, and generate a second voltage difference when they are not matched. A sense amplifier amplifies the voltage difference which becomes large in accordance with imbalance generated in the conduction of the two branch nodes.