中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

10 records (took 0.016 seconds)

    1.
    发明专利
    未知

    公开(公告)号：FR2613094B1

    公开(公告)日：1990-02-16

    申请号：FR8718197

    申请日：1987-12-21

    Applicant: IBM

    Inventor： LO YUAN-CHANG ,  SZAREK JOHN JOSEPH ,  MOELLER DENNIS LEE

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F12/02 ,  G06F11/20

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

    REMAPPAGE DE MEMOIRE DANS UN SYSTEME DE MICRO-ORDINATEUR.
    3.
    发明专利
    REMAPPAGE DE MEMOIRE DANS UN SYSTEME DE MICRO-ORDINATEUR. 未知

    公开(公告)号：BE1001067A3

    公开(公告)日：1989-06-27

    申请号：BE8701440

    申请日：1987-12-16

    Applicant: IBM

    Inventor： LO YUAN-CHANG ,  MOELLER DENNIS LEE ,  SZAREK JOHN JOSEPH

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F

    Abstract: Un système de micro-ordinateur comporte des premiers moyens de mémoire d'adresses d'ordre inférieur soudés au panneau de circuits imprimés plan et peut accepter d'autres moyens de mémoire enfichables dans des moyens de connexion sur le panneau. Sous alimentation, en auto-test, on teste les moyens de mémoire et si une erreur est détectée dans le premier moyen de mémoire, ce moyen de mémoire est déconditionné en dirigeant les adresses de mémoire d'ordre le plus bas aux seconds moyens de mémoire et en réduisant les adresses d'ordre le plus élevé du nombre des emplacements dans les premiers moyens de mémoire.

    4.
    发明专利
    未知

    公开(公告)号：IT1216770B

    公开(公告)日：1990-03-08

    申请号：IT1955588

    申请日：1988-02-26

    Applicant: IBM

    Inventor： LO YUAN CHANG ,  MOELLER DENNIS LEE ,  SZAREK JOHN JOSEPH

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

    5.
    发明专利
    未知

    公开(公告)号：BR8801278A

    公开(公告)日：1988-10-25

    申请号：BR8801278

    申请日：1988-03-22

    Applicant: IBM

    Inventor： LO YUAN-CHANG ,  MOELLER DENNIS LEE ,  SZAREK JOHN JOSEPH

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F11/12

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

    6.
    发明专利
    未知

    公开(公告)号：FR2613094A1

    公开(公告)日：1988-09-30

    申请号：FR8718197

    申请日：1987-12-21

    Applicant: IBM

    Inventor： LO YUAN-CHANG ,  SZAREK JOHN JOSEPH ,  MOELLER DENNIS LEE

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F12/02 ,  G06F11/20

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

    MEMORY RE-MAPPING IN A MICROCOMPUTER SYSTEM
    7.
    发明专利
    MEMORY RE-MAPPING IN A MICROCOMPUTER SYSTEM 未知

    公开(公告)号：GB2202656A

    公开(公告)日：1988-09-28

    申请号：GB8725112

    申请日：1987-10-27

    Applicant: IBM

    Inventor： LO YUAN-CHANG ,  MOELLER DENNIS LEE ,  SZAREK JOHN JOSEPH

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F11/20

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

    MEMORY RE-MAPPING IN A MICROCOMPUTER SYSTEM
    8.
    发明专利
    MEMORY RE-MAPPING IN A MICROCOMPUTER SYSTEM 未知

    公开(公告)号：HK33492A

    公开(公告)日：1992-05-15

    申请号：HK33492

    申请日：1992-05-07

    Applicant: IBM

    Inventor： LO YUAN-CHANG ,  MOELLER DENNIS LEE ,  SZAREK JOHN JOSEPH

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F11/20

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

    MEMORY RE-MAPPING IN A MICROCOMPUTER SYSTEM
    9.
    发明专利
    MEMORY RE-MAPPING IN A MICROCOMPUTER SYSTEM 未知

    公开(公告)号：GB2202656B

    公开(公告)日：1991-09-04

    申请号：GB8725112

    申请日：1987-10-27

    Applicant: IBM

    Inventor： LO YUAN-CHANG ,  MOELLER DENNIS LEE ,  SZAREK JOHN JOSEPH

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

    10.
    发明专利
    未知

    公开(公告)号：IT8819555D0

    公开(公告)日：1988-02-26

    申请号：IT1955588

    申请日：1988-02-26

    Applicant: IBM

    Inventor： LO YUAN CHANG ,  MOELLER DENNIS LEE ,  SZAREK JOHN JOSEPH

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/00 ,  G06F

    Abstract: A microcomputer system has first, low order address, memory means (17) soldered to the planar printed circuit board and can accept further memory means (18) pluggable into socket means on the board. At power on self test, the memory means are tested, and, if an error is detected in the first memory means, this memory means is disabled by directing the lowest order memory addresses to the second memory means and reducing the highest order addresses by the number of locations in the first memory means.

Patent Agency Ranking