公开(公告)号：JP2000321600A

公开(公告)日：2000-11-24

申请号：JP13335599

申请日：1999-05-13

Applicant: IBM

Inventor： TAKECHI KAZUTOSHI ,  KITAHARA HIROAKI

IPC: H01L29/786 ,  G02F1/133 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/36

Abstract: PROBLEM TO BE SOLVED: To obtain a high resolution LCD device without increasing the number of data lines and gate lines by forming pixel arraies to which a data signal is impressed via data lines on respective first surfaces of first and second transparent substrates facing each other to reduce effects of point defects and line defects. SOLUTION: Pixel arraies in which a plurality of pixel areas are arranged in the row direction and a column direction and the data signal is impressed to the pixel areas via data lines D are formed on inner surfaces of upper-side and lower-side glass substrates 22, 23, respectively. Then, in each pixel array, plural lines of gate lines G1 to GM are arranged in the row direction, plural lines of data lines D1 to DN are arranged in the column direction and respective plural pieces of pixel areas are formed at intersections of the data lines D and the gate lines G. One pixel area being on the upper side glass substrate 22 and one pixel area which is on the lower-side glass substrate 23 and faces this pixel area form one pixel P of the LCD device.

公开(公告)号：JPH11297668A

公开(公告)日：1999-10-29

申请号：JP6846598

申请日：1998-03-18

Applicant: IBM

Inventor： TAKECHI KAZUTOSHI ,  KITAHARA HIROAKI

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/336 ,  H01L29/417 ,  H01L29/45 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To make it possible to continuously etch a metal layer and then an amorphous silicon layer which is the base layer for the metal layer in one and the same etching equipment, by etching the metal layer selectively against the amorphous silicon layer and then etching the amorphous silicon layer. SOLUTION: A gate insulating film 22 and an amorphous silicon active layer (a-Si:H) 23 are formed on a gate electrode 21 and then a patterned i-stopper layer 24 is formed on the amorphous silicon active layer 23. Nextly, a metal layer 26 including Mo is formed on a substrate 20 formed with an n-type a-Si:H layer 25, and then the metal layer 26 is etched to a specified pattern. At that time, a value of 3 or above can be obtained for the selectivity of Mo against the a-Si:H layer if the flow rate of chlorine gas is 100-500 SCCM, that of oxygen gas is 30-150 SCCM, that of He is 100-500 SCCM, the pressure is 20-400 mTorr, and the high frequency power density is 0.5-1.0 W/cm . After the metal layer 26 is etched, the n-type a-Si:H layer 25 and the a-Si:H layer 23 are etched.