公开(公告)号：GB2604201A

公开(公告)日：2022-08-31

申请号：GB202113829

申请日：2021-09-28

Applicant: IBM

Inventor： RICHARD HAROLD BOIVIE ,  TONG CHEN ,  ALPER BUYUKTOSUNOGLU ,  GURURAJ SAILESHWAR

IPC: G06F12/02 ,  G06F12/14

Abstract: Techniques facilitating hardware-based memory-error mitigation for heap-objects. In one example, a system can comprise a process that executes computer executable components stored in a non-transitory computer readable medium. The computer executable components comprise: an entry component; and a re-purpose component. The entry component can allocate an entry in a table to store bounds-information when an object is allocated in memory. The re-purpose component can re-purpose unused bits of an object address to store an index to the table entry.

公开(公告)号：GB2605678A

公开(公告)日：2022-10-12

申请号：GB202117483

申请日：2021-12-03

Applicant: IBM

Inventor： TONG CHEN ,  ALPER BUYUKTOSUNOGLU ,  RICHARD HAROLD BOIVIE

IPC: G06F9/30 ,  G06F12/14

Abstract: A method, system and apparatus for protecting against out-of-bounds references, including storing an address of a buffer in a general register and storing bounds information (BI) for the buffer in a bounds information register, and when a content of the general register is used as an address in a load or store operation, using a content of the bounds information register to determine if the load or store is out of bounds.

公开(公告)号：GB2605242A

公开(公告)日：2022-09-28

申请号：GB202117765

申请日：2021-12-09

Applicant: IBM

Inventor： TONG CHEN ,  RICHARD HAROLD BOIVIE ,  ALPER BUYUKTOSUNOGLU

IPC: G06F9/30

Abstract: A method, system and apparatus for providing bound information accesses in buffer protection, including providing one-to-one mapping between a general-purpose register and bound information in a BI (bound information) register, saving loaded bound information in the BI register for future use, providing integrity of the bound information in the BI register that is maintained along program execution, and providing a pro-active load of the bound information with one-bit extra control on load instruction of the BI register. A compiler may determine candidate loads for the pro-active load of the bound information. The method may comprise reducing load request for bound information or hiding load latency or selecting profitable cases with static program analysis.

公开(公告)号：GB2568399A

公开(公告)日：2019-05-15

申请号：GB201819786

申请日：2017-02-20

Applicant: IBM

Inventor： ZEHRA NORMAN SURA ,  TONG CHEN ,  JOHN KEVIN O'BRIEN ,  DANIEL ARTHUR PRENER

IPC: G06F9/50

Abstract: Methods and systems for optimizing an application for a computing system having multiple distinct memory locations that are interconnected by one or more communication channels include determining one or more data handling properties for a data region in an application. 0ne or more data handling policies for the data region are determined based on the one or more data handling properties. Data setup costs are determined for a scope in the application that uses the data region in different memory locations based on the one or more data handling properties. The application is optimized in accordance with the one or more data handling policies and the data setup costs for the different memory locations.