公开(公告)号：GB2495186A

公开(公告)日：2013-04-03

申请号：GB201215925

申请日：2012-09-06

Applicant: IBM

Inventor： WALLS ANDREW DALE ,  TRESSLER GARY

IPC: G06F12/02 ,  G06F3/06

Abstract: Enabling throttling on average write throughput instead of peak write throughput for solid-state storage devices, whilst assuring an average write throughput within a range by allowing excursions of high throughput with periods of low throughput offsetting against those of heavy usage. The mechanism periodically determines average throughput and determines whether average throughput exceeds a high throughput threshold for a certain amount of time without being offset by periods of low write rate. Time registers may be incremented/decremented for given periods of time where average write rate is high or low.

公开(公告)号：GB2495186B

公开(公告)日：2013-08-14

申请号：GB201215925

申请日：2012-09-06

Applicant: IBM

Inventor： WALLS ANDREW DALE ,  TRESSLER GARY

IPC: G06F12/02 ,  G06F3/06