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公开(公告)号：US3919701A
公开(公告)日：1975-11-11
申请号：US35166573
申请日：1973-04-16
Applicant: IBM
Inventor： CHANG HSU , CHEN TIEN CHI , TUNG CHIN
IPC: G06F7/48 , G11C11/14 , H03K19/168 , G11C19/00
CPC classification number: H03K19/168
Abstract: A symmetric switching device which can be personalized to do any mathematical operation relying upon the mounting of the number of bubble domains present. This can be used as a universal logic element to provide any logical function. The device will handle multiple inputs and is rewritable to provide the desired function. The device broadly comprises a counter for counting the number of 1 bits in the input data stream, a means for producing a control data stream for personalizing the switch, and a comparison means for comparing the counter output and the control stream. A particularly suitable embodiment comprises a bubble domain sifter for shifting the position of the bubbles in the input data stream, a leading bubble detector for detecting the leading (first) bubble in the input data stream, means for creating a personalized control bubble stream for designating the function to be performed, and means for comparing the personalized control bubble stream with the output of the leading bubble detector to provide a circuit output representing the output value of the function desired. Means are provided for serial or parallel data inputs to the symmetric switching circuit. Any known type of domain propagation structure can be used to implement this device.
Abstract translation: 一种对称开关装置，其可以被个性化以进行任何数学运算，这依赖于存在的气泡域的数量的安装。 这可以用作通用逻辑元件来提供任何逻辑功能。 该设备将处理多个输入，并且是可重写的，以提供所需的功能。 该设备广泛地包括用于对输入数据流中的1位数进行计数的计数器，用于产生用于个性化该开关的控制数据流的装置，以及用于比较计数器输出和控制流的比较装置。 特别合适的实施例包括用于移动输入数据流中的气泡位置的气泡域筛选器，用于检测输入数据流中的引导（第一）气泡的前导气泡检测器，用于创建个性化控制气泡流的装置，用于指定 要执行的功能，以及用于将个性化控制气泡流与前导气泡检测器的输出进行比较以提供表示所需功能的输出值的电路输出的装置。 提供用于对称开关电路的串行或并行数据输入的装置。 可以使用任何已知类型的域传播结构来实现该设备。
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公开(公告)号：DE2417780A1
公开(公告)日：1974-10-24
申请号：DE2417780
申请日：1974-04-11
Applicant: IBM
Inventor： CHANG HSU , CHEN TIEN CHI , TUNG CHIN , SAN JOSE CALIF
IPC: G06F7/48 , G11C11/14 , H03K19/168
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公开(公告)号：CA1087755A
公开(公告)日：1980-10-14
申请号：CA277083
申请日：1977-04-25
Applicant: IBM
Inventor： CHEN TIEN C , ESWARAN KAPALI P , LUM VINCENT Y , TUNG CHIN
Abstract: AN APPARATUS FOR TRANSPOSITION SORTING OF EQUAL LENGTH RECORDS IN OVERLAP RELATION WITH RECORD LOADING AND EXTRACTION An apparatus for sorting of equal length records with the sorting time maximally overlapped by the time taken for loading and unloading of records. The minimal structure consists of a decision mechanism linked to and associated with a network of ladder structures. The activity within the network is so synchronized that the sorting activity in most ladders occurs while some ladder within the network is still undergoing the loading of input data; and during the unloading phase, the individually sorted data from each ladder are merged concurrently to produce a sequence of sorted records. The overlap between sorting and loading varies from 0 for records requiring no loading/unloading, to 100% for multi-ladder networks with loading/unloading.
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Patent Agency Ranking
公开(公告)号：CA1028066A
公开(公告)日：1978-03-14
申请号：CA223590
申请日：1975-03-27
Applicant: IBM
Inventor： CHANG HSU , CHEN TIEN C , LEE SHARE-YOUNG , TUNG CHIN
IPC: B41J5/30 , B41J5/44 , G06F3/12 , G06F17/22 , G06F17/24 , G06K17/00 , G09G5/00 , G09G5/32 , G11C11/14 , G11C19/08 , B41B27/18
Abstract: 1487121 Shift registers INTERNATIONAL BUSINESS MACHINES CORP 1 May 1975 [14 May 1974] 18157/75 Heading G4C To edit a text, a shift register storing a line of data bits representing text has a normal path 34 (Fig. 2A) and a by-pass path 36 so that the order of the bits may be changed, gaps in the data may be closed and data bits may be deleted. The shift register may be either a medium capable of supporting magnetic bubble domains in which case drive pulses for the register in the form of an unchanged repetitive sequence of drive pulses are provided by a rotating magnetic field or a charge coupled device in which case three phase propagation lines receive successive signals. As described the normal path includes a freeze and input/output position at which new data may be written by a write circuit (48, Fig. 2B, not shown), annihilated (in the case of the bubble domain embodiment by passing a large current through freeze loop (46)) or held whilst other data is shifted round the by-pass loop. The editing shift register (24, Fig. 1, not shown) is connected between the read decoder output from and the write decoder input to a plurality of shift registers (SR1-SRn) used for storing data text. A spare shift register (SR) is provided so that the contents of the shift registers may be interchanged.
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公开(公告)号：AU8106675A
公开(公告)日：1976-11-18
申请号：AU8106675
申请日：1975-05-12
Applicant: IBM
Inventor： CHANG HSU , CHEN TIEN C , LEE SHARE-YOUNG , TUNG CHIN
IPC: B41J5/30 , B41J5/44 , G06F3/12 , G06F17/22 , G06F17/24 , G06K17/00 , G09G5/00 , G09G5/32 , G11C11/14 , G11C19/08 , H03K23/24 , H03K23/32 , G11B27/02
Abstract: 1487121 Shift registers INTERNATIONAL BUSINESS MACHINES CORP 1 May 1975 [14 May 1974] 18157/75 Heading G4C To edit a text, a shift register storing a line of data bits representing text has a normal path 34 (Fig. 2A) and a by-pass path 36 so that the order of the bits may be changed, gaps in the data may be closed and data bits may be deleted. The shift register may be either a medium capable of supporting magnetic bubble domains in which case drive pulses for the register in the form of an unchanged repetitive sequence of drive pulses are provided by a rotating magnetic field or a charge coupled device in which case three phase propagation lines receive successive signals. As described the normal path includes a freeze and input/output position at which new data may be written by a write circuit (48, Fig. 2B, not shown), annihilated (in the case of the bubble domain embodiment by passing a large current through freeze loop (46)) or held whilst other data is shifted round the by-pass loop. The editing shift register (24, Fig. 1, not shown) is connected between the read decoder output from and the write decoder input to a plurality of shift registers (SR1-SRn) used for storing data text. A spare shift register (SR) is provided so that the contents of the shift registers may be interchanged.
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公开(公告)号：FR2303348A1
公开(公告)日：1976-10-01
申请号：FR7602210
申请日：1976-01-20
Applicant: IBM
Inventor： CHEN TIEN CHI , TUNG CHIN
Abstract: An apparatus for performing efficient transposition exchange sorts among equal length records is described. The apparatus takes advantage of the flow steering property of linkable circulating storage loops to minimize the average access time by positioning information closer to the output port in a storage structure. The apparatus is formed from a linear array of equal size shift register loops each holding one record. The loops are switchably interconnected such that when two boundary switches are set in a first mode, the contents of each loop normally circulate wholly therewithin. Upon a common boundary switch being set in a second mode, the contents within a first loop flow into a second loop and vis-a-vis. By setting a common boundary switch to the second mode, the contents of a pair of adjacent loops are exchanged in the duration of one loop cycle time. Further exchanges can be started before a previous one is complete; this overlapping of operations can lead to an effective exchange rate of two exchanges per loop cycle. By repeating the exchange for consecutive pairs of loops, then the contents of any reference loop can be migrated to an output port D loops away in (D + 1)/2 loop cycle times.
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公开(公告)号：FR2372470A1
公开(公告)日：1978-06-23
申请号：FR7731534
申请日：1977-10-07
Applicant: IBM
Inventor： CHEN TIEN CHI , TUNG CHIN , LUM VINCENT Y
IPC: G06F7/22
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公开(公告)号：FR2351452A1
公开(公告)日：1977-12-09
申请号：FR7711168
申请日：1977-04-05
Applicant: IBM
Inventor： CHEN TIEN C , ESWARAN KAPALI P , LUM VINCENT Y , TUNG CHIN
Abstract: An apparatus for sorting of equal length records with the sorting time maximally overlapped by the time taken for loading and unloading of records. The minimal structure consists of a decision mechanism linked to and associated with a network of ladder structures. The activity within the network is so synchronized that the sorting activity in most ladders occurs while some ladder within the network is still undergoing the loading of input data; and during the unloading phase, the individually sorted data from each ladder are merged concurrently to produce a sequence of sorted records. The overlap between sorting and loading varies from 0 for records requiring no loading/unloading, to 100% for multi-ladder networks with loading/unloading.
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