中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

3 records (took 0.015 seconds)

    MEMORY AND DISPLAY SYSTEM FOR GRAPHICS
    1.
    发明专利
    MEMORY AND DISPLAY SYSTEM FOR GRAPHICS 未知

    公开(公告)号：DE3167134D1

    公开(公告)日：1984-12-20

    申请号：DE3167134

    申请日：1981-02-25

    Applicant: IBM

    Inventor： SCHUTT DIETER DR ,  SCHWENGLER MANFRED DR ,  ULLAND HARTMUT ,  WEIS HELMUT

    IPC: G06F3/153 ,  G06F12/02 ,  G06F13/00 ,  G09G1/16 ,  G09G5/00 ,  G09G5/39 ,  G09G5/393 ,  G09G5/395

    Abstract: A device for storing and displaying graphic information having a storage unit for storing both blocks and rows of data and retrieving rows of data. The storage unit consists of two storage segments, with eight storage modules each, which can operate in an interleaved mode. This permits two-dimensional addressing which consists of distributing the individual elements of a data block over the various separately addressable modules of the storage unit so that no one module contains more than one element of the data block, and that all elements of the data block can be read out in one cycle through simultaneous access of all of the storage modules.

    DEVICE FOR STORING AND DISPLAYING GRAPHIC INFORMATION
    2.
    发明专利
    DEVICE FOR STORING AND DISPLAYING GRAPHIC INFORMATION 未知

    公开(公告)号：CA1189992A

    公开(公告)日：1985-07-02

    申请号：CA371973

    申请日：1981-02-27

    Applicant: IBM

    Inventor： SCHUETT DEITER ,  SCHWENGLER MANFRED ,  ULLAND HARTMUT ,  WEIS HELMUT

    IPC: G06F3/153 ,  G06F12/02 ,  G06F13/00 ,  G09G1/16 ,  G09G5/00 ,  G09G5/39 ,  G09G5/393 ,  G09G5/395 ,  G09G1/02 ,  G09G3/00

    Abstract: As a screen refreshing storage in a graphic processor a storage system 10 is presented that shows a very high access rate for data blocks used in graphic processors. For storing e.g. square data blocks, or for retrieving a row section of the display 23 only one storage access is required: this is a consequence of the specifically selected interleaving of the individual storage modules 16 and of data editing for the respective access formats. The two-dimensional addressing for storing the data block distributes the individual elements of the data block to the modules in such a manner that the same storage addresses of all modules finally present a full picture of a row sectinn of the display. Between processor 1 or 7 and storage 10 a block buffer 4 is also provided operating in pingpong mode.

Patent Agency Ranking