2.
    发明专利
    未知

    公开(公告)号:FR2354596A1

    公开(公告)日:1978-01-06

    申请号:FR7713452

    申请日:1977-04-26

    Applicant: IBM

    Abstract: Logic circuitry is provided for controlling the transfer of data between 1) a low cost pipelined processor and its associated memory, 2) between the processor and input/output devices, and 3) between the input/output devices and memory. A plurality of unidirectional busses are provided to interface the processor and memory and a bidirectional buss is provided to interface with the input/output devices. The logic circuitry provides a control function to steer data over the proper buss structures interconnecting the processor, the memory and the input/output devices and provides those interconnections in a manner which allows the processor to overlap input and output functions.

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