2.
    发明专利
    未知

    公开(公告)号:DE3851928D1

    公开(公告)日:1994-12-01

    申请号:DE3851928

    申请日:1988-08-04

    Applicant: IBM

    Abstract: A plurality of host processors share access to a peripheral data storage sub-system and each have program means for controlling asynchronous operations of the sub-system. Control blocks in each of the host processors are addressably linked together for enabling inferred access to a unit control block (UCB) for any of a plurality of peripheral devices in the sub-system. The sub-system selectively groups some of the devices such that only devices designated as primary devices are addressably accessible by host processor application programs. Other devices in the respective groups are secondary devices and are accessed by the sub-system whenever the primary device in the same group cannot perform a host processor commanded operation. Means are provided for identifying the secondary devices to all of the host processors.

    3.
    发明专利
    未知

    公开(公告)号:BR8801415A

    公开(公告)日:1988-11-01

    申请号:BR8801415

    申请日:1988-03-28

    Applicant: IBM

    Abstract: An updatable and expandable directory structure and resultant access procedures emulating a write-once or indelible record medium (20) to a rewriteable record medium as to accessing characteristics. The directory is indexed; one directory header for a first set of files indexes another set of files. Sector clusters or data extents are managed such that random recording from any file proceeds independently of write-once characteristics. The directory is stored on the medium as data is recorde. Each directory entry contains an archival history of recording of a related data file in the medium. Both logical and physical addressing is employable.

    4.
    发明专利
    未知

    公开(公告)号:DE3856090T2

    公开(公告)日:1998-06-25

    申请号:DE3856090

    申请日:1988-03-23

    Applicant: IBM

    Abstract: An updatable and expandable directory structure and resultant access procedures emulating a write-once or indelible record medium (20) to a rewriteable record medium as to accessing characteristics. The directory is indexed; one directory header for a first set of files indexes another set of files. Sector clusters or data extents are managed such that random recording from any file proceeds independently of write-once characteristics. The directory is stored on the medium as data is recorde. Each directory entry contains an archival history of recording of a related data file in the medium. Both logical and physical addressing is employable.

    5.
    发明专利
    未知

    公开(公告)号:DE3851730D1

    公开(公告)日:1994-11-10

    申请号:DE3851730

    申请日:1988-06-10

    Applicant: IBM

    Abstract: The disclosure relates to sequential performance of a cached data storage subsystem with a minimal control signal processing. Sequential access is first detected by monitoring and examining the quantity of data accessed per unit of data storage (track) across a set of contiguously addressable tracks. Since the occupancy of the data in the cache is usually time limited, this examination provides an indication of the rate of sequential processing for a data set, i.e., a data set is being processed usually in contiguously addressable data storage units of a data storage system. Based upon the examination of a group of the tracks in a cache, the amount of data to be promoted to the cache from a backing store in anticipation of future host processor references is optimised. A promotion factor is calculated by combining the access extents monitored in the individual data storage areas and is expressed in a number of tracks units to be promoted. The examination of the group of tracks units and the implementation of the data promotion and demotion (early cast-out) is synchronised which results in a synergistic effect for increasing throughput of the cache for sequentially-processed data. A limit of promotion is determined to create a window of sequential data processing.

    6.
    发明专利
    未知

    公开(公告)号:DE3856090D1

    公开(公告)日:1998-02-05

    申请号:DE3856090

    申请日:1988-03-23

    Applicant: IBM

    Abstract: An updatable and expandable directory structure and resultant access procedures emulating a write-once or indelible record medium (20) to a rewriteable record medium as to accessing characteristics. The directory is indexed; one directory header for a first set of files indexes another set of files. Sector clusters or data extents are managed such that random recording from any file proceeds independently of write-once characteristics. The directory is stored on the medium as data is recorde. Each directory entry contains an archival history of recording of a related data file in the medium. Both logical and physical addressing is employable.

    8.
    发明专利
    未知

    公开(公告)号:DE3851730T2

    公开(公告)日:1995-05-04

    申请号:DE3851730

    申请日:1988-06-10

    Applicant: IBM

    Abstract: The disclosure relates to sequential performance of a cached data storage subsystem with a minimal control signal processing. Sequential access is first detected by monitoring and examining the quantity of data accessed per unit of data storage (track) across a set of contiguously addressable tracks. Since the occupancy of the data in the cache is usually time limited, this examination provides an indication of the rate of sequential processing for a data set, i.e., a data set is being processed usually in contiguously addressable data storage units of a data storage system. Based upon the examination of a group of the tracks in a cache, the amount of data to be promoted to the cache from a backing store in anticipation of future host processor references is optimised. A promotion factor is calculated by combining the access extents monitored in the individual data storage areas and is expressed in a number of tracks units to be promoted. The examination of the group of tracks units and the implementation of the data promotion and demotion (early cast-out) is synchronised which results in a synergistic effect for increasing throughput of the cache for sequentially-processed data. A limit of promotion is determined to create a window of sequential data processing.

    9.
    发明专利
    未知

    公开(公告)号:DE3851928T2

    公开(公告)日:1995-04-20

    申请号:DE3851928

    申请日:1988-08-04

    Applicant: IBM

    Abstract: A plurality of host processors share access to a peripheral data storage sub-system and each have program means for controlling asynchronous operations of the sub-system. Control blocks in each of the host processors are addressably linked together for enabling inferred access to a unit control block (UCB) for any of a plurality of peripheral devices in the sub-system. The sub-system selectively groups some of the devices such that only devices designated as primary devices are addressably accessible by host processor application programs. Other devices in the respective groups are secondary devices and are accessed by the sub-system whenever the primary device in the same group cannot perform a host processor commanded operation. Means are provided for identifying the secondary devices to all of the host processors.

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