公开(公告)号：DE3484987D1

公开(公告)日：1991-10-02

申请号：DE3484987

申请日：1984-11-09

Applicant: IBM

Inventor： DILL FREDERICK HAYES ,  GUPTA SATISH ,  WARTER PETER JAMES

IPC: G11C11/401 ,  G11C7/20 ,  G11C7/00

Abstract: A random access memory comprising cells (125) is rapidly reset (cleared) to a predetermined conditions (e.g. all ones), by providing an appropriate signal on a data-in lead (132), which sets line (135) to "1" (or "0") providing a signal on fast clear lead (130) which closes switches in a switch bank (138), which sets the bit lines (128) at the level of line (135), and sequentially energizing the word lines (124).