公开(公告)号：JP2000137612A

公开(公告)日：2000-05-16

申请号：JP9931799

申请日：1999-04-06

Applicant: IBM

Inventor： CHARLES F WEBB ,  WEN HEI LEE

IPC: G06F9/38 ,  G06F9/22 ,  G06F9/28 ,  G06F9/30 ,  G06F9/318 ,  G06F13/00

Abstract: PROBLEM TO BE SOLVED: To reduce the number of millicode instructions and the number of machine cycles by executing a pack decimal division instruction as an inner code instruction and maintaining control by an inner code. SOLUTION: A cache memory unit 12 logically contains a writable inner code array 13 where a continuous address can be designated and millimode routines which are frequently called are stored in the inner code array 13. Conversion fetch (TRFET) millicode instruction supports a TRT instruction and a special millicode instruction for pack binary division realizes the access, inspection, preparation and storage function of an operand by using hardware control and data flow logic, which are designed to support a simpler pack binary operation containing addition and generates a quotient number. They are executed as inner code instructions and control is maintained in an inner code.