公开(公告)号：CA2082077A1

公开(公告)日：1993-08-21

申请号：CA2082077

申请日：1992-11-04

Applicant: IBM

Inventor： BARTOW NEIL G ,  BROWN PAUL J ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  SUGRUE PATRICK J ,  WESTCOTT DOUGLAS W ,  ZEYAK VINCENT P JR

IPC: H04J3/06 ,  H04L25/02 ,  H04L69/40

Abstract: A system and method for asynchronously transmitting data blocks, in parallel, across multiple fibers in a serial manner. Frame groups are provided as a mechanism to transmit associated data serially on each fiber and tie the data being transmitted together. The frame groups do not have sequence numbers, therefore, the receiver determines which frames are part of a frame group by the arrival times of the individual frames. In one embodiment, the transceivers for each member of the parallel bus asynchronously achieve synchronism at each end of the fiber. Thus the need for a common clock is eliminated. The receivers on each side of the bus determine the relative skew for each conductor by performing skew measurements on a calibration message generated by the transmitters on the other side of the bus. When the skew on all conductors, viewed from both sides of the bus, has been determined, the skew values are exchanged across the bus, thus enabling the transmitters to set proper frame spacing.

公开(公告)号：CA1106979A

公开(公告)日：1981-08-11

申请号：CA318991

申请日：1979-01-03

Applicant: IBM

Inventor： PASCOE ROBERT A ,  SPROTT CHARLES N ,  WESTCOTT DOUGLAS W

IPC: G06F7/78 ,  G06F12/00 ,  G11C19/00

Abstract: SYSTEM FOR RANDOMLY ACCESSING A RECIRCULATING MEMORY A control system for randomly accessing the contents of a recirculating shift register memory under the control of a processor. The processor provides to the control system an address equivalent to the number of positions the operating point (defined by an operating flag) is to be moved in the shift register memory to access the information desired by the processor. The control system decodes the address, removes the operating flag from the memory character stream and reinserts the operating flag in the memory at the point desired by the processor during a single revolution of the memory. AT9-78-002

公开(公告)号：BR9300358A

公开(公告)日：1993-08-24

申请号：BR9300358

申请日：1993-01-28

Applicant: IBM

Inventor： BARTOW NEIL B ,  BROWN PAUL J ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  SUGRUE PATRICK J ,  WESTCOTT DOUGLAS W ,  ZEYAK VINCENT P JR

IPC: H04J3/06 ,  H04L25/02 ,  H04L69/40 ,  H04B10/12

Abstract: A system and method for asynchronously transmitting data blocks, in parallel, across multiple fibers in a serial manner. Frame groups are provided as a mechanism to transmit associated data serially on each fiber and tie the data being transmitted together. The frame groups do not have sequence numbers, therefore, the receiver determines which frames are part of a frame group by the arrival times of the individual frames. In one embodiment, the transceivers for each member of the parallel bus asynchronously achieve synchronism at each end of the fiber. Thus the need for a common clock is eliminated. The receivers on each side of the bus determine the relative skew for each conductor by performing skew measurements on a calibration message generated by the transmitters on the other side of the bus. When the skew on all conductors, viewed from both sides of the bus, has been determined, the skew values are exchanged across the bus, thus enabling the transmitters to set proper frame spacing.

公开(公告)号：CA2089771A1

公开(公告)日：1993-08-21

申请号：CA2089771

申请日：1993-02-18

Applicant: IBM

Inventor： BARTOW NEIL G ,  BROWN PAUL J ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  WESTCOTT DOUGLAS W

IPC: G06F13/00 ,  G06F13/12 ,  G06F13/38 ,  H04L69/40

Abstract: Buffers 54,58 are provided in two elements 52,56 between which data is to be transferred wherein both buffers are managed solely by the originator of the data transfer. Only one transfer is required to transmit a message, and a second transfer acknowledges the completion of the function because message delivery to the receiver is guaranteed under the implemented protocol. When a request is sent, a message timer is started at the sender. When the normal response for the request is received, the timer is reset; however, if the duration of the message operation exceeds the timeout value, a message-timeout procedure is initiated. When the cancel command is issued, a second timer is set. If this timer is exceeded, subsequent cancel commands can be issued. If subsequent cancel commands are issued, a cancel complete command must be sent and responded to. Since the commands must be executed in the sequence in which they are received, a response to the cancel complete command ensures that there are no other cancel operation commands remaining in the receiver, allowing subsequent operations to start without danger of being cancelled.

公开(公告)号：BR9300357A

公开(公告)日：1993-08-24

申请号：BR9300357

申请日：1993-01-28

Applicant: IBM

Inventor： BARTOW NEIL G ,  BROWN PAUL J ,  CAPOWSKI ROBERTO S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  WESTCOTT DOUGLAS W

IPC: G06F13/00 ,  G06F13/12 ,  G06F13/38 ,  H04L69/40

Abstract: Buffers 54,58 are provided in two elements 52,56 between which data is to be transferred wherein both buffers are managed solely by the originator of the data transfer. Only one transfer is required to transmit a message, and a second transfer acknowledges the completion of the function because message delivery to the receiver is guaranteed under the implemented protocol. When a request is sent, a message timer is started at the sender. When the normal response for the request is received, the timer is reset; however, if the duration of the message operation exceeds the timeout value, a message-timeout procedure is initiated. When the cancel command is issued, a second timer is set. If this timer is exceeded, subsequent cancel commands can be issued. If subsequent cancel commands are issued, a cancel complete command must be sent and responded to. Since the commands must be executed in the sequence in which they are received, a response to the cancel complete command ensures that there are no other cancel operation commands remaining in the receiver, allowing subsequent operations to start without danger of being cancelled.

公开(公告)号：CA2082078A1

公开(公告)日：1993-08-21

申请号：CA2082078

申请日：1992-11-04

Applicant: IBM

Inventor： BARTOW NEIL G ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  WESTCOTT DOUGLAS W

IPC: G06F13/00 ,  G06F15/17 ,  H04L69/14 ,  H04L69/40

Abstract: A system for the transmission of information between elements of a data processing complex and a method for establishing such a system. Two elements A, B of a data processing system are connected by a physical link comprising multiple conductors 100, 101 attached to transceivers 130, 140 at channels in each data processing element. Once the transceivers have been synchronized, commands and responses are exchanged which ensure that all of the transceivers in a channel are connected to the same channel on the other end of the conductor. If the transceivers are considered configured and an entry is made in a Configured-Transceiver table. A search is made of an Allowed-Operational-Link table which contains sets of transceivers which are allowed to become operational links. The set of transceivers thus found, is compared against the Configured-Transceiver-Table to verify that all of the members of the set have been configured. If a match is found, this set of transceivers becomes an Intended-Operational-Link. The Intended-Operational-Link is verified to ensure that both channels agree on the set of conductors will form the operational link. If the Intended-Operational-Link verifies, the operational link is established therefrom.