公开(公告)号：JPH10222477A

公开(公告)日：1998-08-21

申请号：JP852498

申请日：1998-01-20

Applicant: IBM

Inventor： GREGG THOMAS A ,  KALWONT MANDORA PANDY

IPC: G06F15/16 ,  G06F15/163 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To speed up valid link transfer speed when the link frame of data is communication between a system emitting a command and a system receiving the command by automatically controlling the reading or writing of multiple storage blocks distributed in the storage area of the command reception system. SOLUTION: A connection mechanism (CF) is the system receiving the command at one end of a link and a center processing complex(CPC) is the system emitting the command at the other end of the link and it requests the operation of the writing or reading of the structure of CF. An inter CF system channel contains a data mover 1006 connected to a memory 1002 and a processor 1004. A TRANSFER STRUCTURE (TS) instruction is executed only in the system receiving the command in response to CF receiving the SEND MESSAGE command and structure is transferred between CPC and CF through the link 910 in any link direction.

公开(公告)号：JP2012048712A

公开(公告)日：2012-03-08

申请号：JP2011169787

申请日：2011-08-03

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： CRADDOCK DAVID ,  GREGG THOMAS A

IPC: G06F13/28 ,  G06F13/36

CPC classification number: G06F13/28

Abstract: PROBLEM TO BE SOLVED: To provide a computer program product, a computer system and a method, capable of facilitating processing in a computer environment.SOLUTION: A request to perform an operation, such as a remote direct memory access (RDMA) write operation or a send operation that writes to memory, is sent from a sending input/output (I/O) adapter (e.g., an RDMA-capable adapter) to a receiving I/O adapter. The receiving I/O adapter receives the request and initiates performance of the operation, but delays sending an acknowledgement for the operation. The acknowledgement is delayed until the operation is completed (i.e., until the memory is updated and the data are visible to the remote processor), as determined by a read operation initiated and performed by the receiving I/O adapter transparent to the sending I/O adapter.

Abstract translation: 要解决的问题：提供能够促进计算机环境中的处理的计算机程序产品，计算机系统和方法。 解决方案：从发送输入/输出（I / O）适配器发送执行诸如远程直接存储器访问（RDMA）写入操作或写入存储器的发送操作之类的操作的请求（例如， 支持RDMA的适配器）连接到接收I / O适配器。 接收I / O适配器接收请求并发起操作的性能，但延迟发送操作的确认。 确认被延迟，直到操作完成（即直到存储器被更新并且数据对于远程处理器是可见的），如由发送I / O适配器发起和执行的读取操作所确定的，对于发送I / O适配器。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2008172795A

公开(公告)日：2008-07-24

申请号：JP2008002431

申请日：2008-01-09

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： GREGG THOMAS A ,  CRADDOCK DAVID

IPC: H04L12/56

CPC classification number: H04L47/10 ,  H04L47/11 ,  H04L47/263 ,  Y02D50/10

Abstract: PROBLEM TO BE SOLVED: To extend transmission distances between a transmitter and a receiver by disabling an InfiniBand-defined credit based flow control. SOLUTION: An InfiniBand-defined credit based flow control suffers from round trip time lag that slows transmission rates. The InfiniBand credit based flow control is disabled to extend transmission distances between a transmitter and a receiver by solving the defect. Disabling InfiniBand credit based flow control enables back to back data packet transmission because credit counts are ignored. Nonetheless, packets can be lost due to overruns in a receive buffer, therefore, packet drop detection mechanisms are employed so that the InfiniBand receiver can send requests to the InfiniBand transmitter to temporarily slow its InfiniBand transmission rate of the data packets. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：通过禁用InfiniBand定义的基于信用的流量控制来扩展发射机和接收机之间的传输距离。 解决方案：基于InfiniBand定义的基于信用的流量控制受到往返延迟的影响，导致传输速率降低。 基于InfiniBand信用流量控制被禁用，通过解决缺陷来扩展发射机和接收机之间的传输距离。 禁用InfiniBand信用流量控制可以背靠背数据包传输，因为信用计数被忽略。 然而，由于接收缓冲器中的超载，分组可能丢失，因此采用分组丢弃检测机制，使得InfiniBand接收机可以向InfiniBand发送器发送请求以暂时降低其InfiniBand传输速率的数据分组。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2008102921A

公开(公告)日：2008-05-01

申请号：JP2007251706

申请日：2007-09-27

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： GREGG THOMAS A

IPC: G06F9/50 ,  G06F9/46 ,  G06F13/10

CPC classification number: G06F13/12

Abstract: PROBLEM TO BE SOLVED: To disclose a data processing system and a method for separating a plurality of input/output adapter units of the system. SOLUTION: The data processing system has a set of processors, a host bridge and a system bus for connecting the set of processors with the host bridge in addition to the input/output adapter unit. Each input/output adapter unit has each identifier and the set of processors transmit commands including one or more identifiers of the input/output adapter units to the host bridge. In a suitable embodiment, the identifiers are unit IDs of hyper-transport definition and the commands issued by the set of processors include unit ID fields including one or more unit IDs of the input/output adapters. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：公开一种用于分离系统的多个输入/输出适配器单元的数据处理系统和方法。 解决方案：除了输入/输出适配器单元之外，数据处理系统还具有一组处理器，主机桥和系统总线，用于将处理器集合与主机桥连接。 每个输入/输出适配器单元具有每个标识符，并且该组处理器将包括输入/​​输出适配器单元的一个或多个标识符的命令发送到主机桥。 在合适的实施例中，标识符是超传输定义的单元ID，并且由该组处理器发出的命令包括包括输入/​​输出适配器的一个或多个单元ID的单元ID字段。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2003216592A

公开(公告)日：2003-07-31

申请号：JP2002275672

申请日：2002-09-20

Applicant: IBM

Inventor： ARNDT RICHARD LOUIS ,  CRADDOCK DAVID F ,  GREGG THOMAS A ,  JUDD IAN DAVID ,  PFISTER GREGORY FRANCIS ,  RECIO RENATO JOHN ,  DONALD WILLIAM SCHMIDT

IPC: G06F15/17 ,  G06F9/54 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide some optimizing techniques for sending a work request from a consumer to a channel adapter hardware, and method, device and program for sending a work completion to the consumer. SOLUTION: A distributed computing system having host and I/O end nodes, switches, routers and links interconnecting these components is provided. The end nodes use a pair of transmission/reception queues to transmit/receive messages. The end nodes use completion queues to inform the end user when messages have been completely sent or received and whether an error occurred during the message transmission or reception process. A mechanism for controlling the transfer of the work requests from the consumer to the channel adapter hardware by using only head pointers in the hardware is described. COPYRIGHT: (C)2003,JPO

公开(公告)号：CA2082077A1

公开(公告)日：1993-08-21

申请号：CA2082077

申请日：1992-11-04

Applicant: IBM

Inventor： BARTOW NEIL G ,  BROWN PAUL J ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  SUGRUE PATRICK J ,  WESTCOTT DOUGLAS W ,  ZEYAK VINCENT P JR

IPC: H04J3/06 ,  H04L25/02 ,  H04L69/40

Abstract: A system and method for asynchronously transmitting data blocks, in parallel, across multiple fibers in a serial manner. Frame groups are provided as a mechanism to transmit associated data serially on each fiber and tie the data being transmitted together. The frame groups do not have sequence numbers, therefore, the receiver determines which frames are part of a frame group by the arrival times of the individual frames. In one embodiment, the transceivers for each member of the parallel bus asynchronously achieve synchronism at each end of the fiber. Thus the need for a common clock is eliminated. The receivers on each side of the bus determine the relative skew for each conductor by performing skew measurements on a calibration message generated by the transmitters on the other side of the bus. When the skew on all conductors, viewed from both sides of the bus, has been determined, the skew values are exchanged across the bus, thus enabling the transmitters to set proper frame spacing.

公开(公告)号：BR9300358A

公开(公告)日：1993-08-24

申请号：BR9300358

申请日：1993-01-28

Applicant: IBM

Inventor： BARTOW NEIL B ,  BROWN PAUL J ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  SUGRUE PATRICK J ,  WESTCOTT DOUGLAS W ,  ZEYAK VINCENT P JR

IPC: H04J3/06 ,  H04L25/02 ,  H04L69/40 ,  H04B10/12

Abstract: A system and method for asynchronously transmitting data blocks, in parallel, across multiple fibers in a serial manner. Frame groups are provided as a mechanism to transmit associated data serially on each fiber and tie the data being transmitted together. The frame groups do not have sequence numbers, therefore, the receiver determines which frames are part of a frame group by the arrival times of the individual frames. In one embodiment, the transceivers for each member of the parallel bus asynchronously achieve synchronism at each end of the fiber. Thus the need for a common clock is eliminated. The receivers on each side of the bus determine the relative skew for each conductor by performing skew measurements on a calibration message generated by the transmitters on the other side of the bus. When the skew on all conductors, viewed from both sides of the bus, has been determined, the skew values are exchanged across the bus, thus enabling the transmitters to set proper frame spacing.

公开(公告)号：CA2089771A1

公开(公告)日：1993-08-21

申请号：CA2089771

申请日：1993-02-18

Applicant: IBM

Inventor： BARTOW NEIL G ,  BROWN PAUL J ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  WESTCOTT DOUGLAS W

IPC: G06F13/00 ,  G06F13/12 ,  G06F13/38 ,  H04L69/40

Abstract: Buffers 54,58 are provided in two elements 52,56 between which data is to be transferred wherein both buffers are managed solely by the originator of the data transfer. Only one transfer is required to transmit a message, and a second transfer acknowledges the completion of the function because message delivery to the receiver is guaranteed under the implemented protocol. When a request is sent, a message timer is started at the sender. When the normal response for the request is received, the timer is reset; however, if the duration of the message operation exceeds the timeout value, a message-timeout procedure is initiated. When the cancel command is issued, a second timer is set. If this timer is exceeded, subsequent cancel commands can be issued. If subsequent cancel commands are issued, a cancel complete command must be sent and responded to. Since the commands must be executed in the sequence in which they are received, a response to the cancel complete command ensures that there are no other cancel operation commands remaining in the receiver, allowing subsequent operations to start without danger of being cancelled.

公开(公告)号：BR9300357A

公开(公告)日：1993-08-24

申请号：BR9300357

申请日：1993-01-28

Applicant: IBM

Inventor： BARTOW NEIL G ,  BROWN PAUL J ,  CAPOWSKI ROBERTO S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  WESTCOTT DOUGLAS W

IPC: G06F13/00 ,  G06F13/12 ,  G06F13/38 ,  H04L69/40

Abstract: Buffers 54,58 are provided in two elements 52,56 between which data is to be transferred wherein both buffers are managed solely by the originator of the data transfer. Only one transfer is required to transmit a message, and a second transfer acknowledges the completion of the function because message delivery to the receiver is guaranteed under the implemented protocol. When a request is sent, a message timer is started at the sender. When the normal response for the request is received, the timer is reset; however, if the duration of the message operation exceeds the timeout value, a message-timeout procedure is initiated. When the cancel command is issued, a second timer is set. If this timer is exceeded, subsequent cancel commands can be issued. If subsequent cancel commands are issued, a cancel complete command must be sent and responded to. Since the commands must be executed in the sequence in which they are received, a response to the cancel complete command ensures that there are no other cancel operation commands remaining in the receiver, allowing subsequent operations to start without danger of being cancelled.

公开(公告)号：CA2082078A1

公开(公告)日：1993-08-21

申请号：CA2082078

申请日：1992-11-04

Applicant: IBM

Inventor： BARTOW NEIL G ,  CAPOWSKI ROBERT S ,  FASANO LOUIS T ,  GREGG THOMAS A ,  SALYER GREGORY ,  WESTCOTT DOUGLAS W

IPC: G06F13/00 ,  G06F15/17 ,  H04L69/14 ,  H04L69/40

Abstract: A system for the transmission of information between elements of a data processing complex and a method for establishing such a system. Two elements A, B of a data processing system are connected by a physical link comprising multiple conductors 100, 101 attached to transceivers 130, 140 at channels in each data processing element. Once the transceivers have been synchronized, commands and responses are exchanged which ensure that all of the transceivers in a channel are connected to the same channel on the other end of the conductor. If the transceivers are considered configured and an entry is made in a Configured-Transceiver table. A search is made of an Allowed-Operational-Link table which contains sets of transceivers which are allowed to become operational links. The set of transceivers thus found, is compared against the Configured-Transceiver-Table to verify that all of the members of the set have been configured. If a match is found, this set of transceivers becomes an Intended-Operational-Link. The Intended-Operational-Link is verified to ensure that both channels agree on the set of conductors will form the operational link. If the Intended-Operational-Link verifies, the operational link is established therefrom.