公开(公告)号：DE3176547D1

公开(公告)日：1988-01-07

申请号：DE3176547

申请日：1981-09-16

Applicant: IBM

Inventor： EVANS CHARLES WESLEY ,  FLUSCHE FREDERICK OTTO ,  MESSINA BENEDICTO UMBERTO ,  RICHARDSON ETHEL LOUISE ,  ROBINSON JAMES ROBERT ,  WETZEL JOSEPH ALBERT

IPC: G06F12/00 ,  G06F12/08

公开(公告)号：DE3274590D1

公开(公告)日：1987-01-15

申请号：DE3274590

申请日：1982-04-27

Applicant: IBM

Inventor： NADARZYNSKI EDWARD ALEXANDER ,  WETZEL JOSEPH ALBERT

IPC: G06F9/22 ,  G06F9/06 ,  G06F9/26 ,  G06F9/318 ,  G06F11/00 ,  G06F12/12

公开(公告)号：MX153124A

公开(公告)日：1986-08-06

申请号：MX19295682

申请日：1982-06-01

Applicant: IBM

Inventor： NADARZYNSKI EDWARD ALEXANDER ,  WETZEL JOSEPH ALBERT

IPC: G06F9/22 ,  G06F9/06 ,  G06F9/26 ,  G06F9/318

公开(公告)号：DE3066708D1

公开(公告)日：1984-03-29

申请号：DE3066708

申请日：1980-10-15

Applicant: IBM

Inventor： CHRISTENSEN NEAL TAYLOR ,  VAN LOO WILLIAM CHARLES ,  WERNER ROBERT HELMUT ,  WETZEL JOSEPH ALBERT ,  ZEITLER JR

IPC: G06F13/14 ,  G06F9/46 ,  G06F9/48 ,  G06F13/26 ,  G06F15/16 ,  G06F15/177 ,  G06F13/00 ,  G06F3/04

Abstract: For increased flexibility and efficiency of handling I/O interrupt requests (I/O IR's) in a multiprocessor system having a system controller (SC, 22), processors (CP 20, 21) shared main storage (23) and in I/O processor (IOP in 24), the IOP inserts I/O IR entries onto the queues in MS in accordance with the type of interrupt which entries are only removed by the CPs, after their selection by the controller (SC) for execution of an appropriate interruption handling program. Bit positions in an I/O IR pending register (46) in the SC are respectively assigned to the I/O IR queues in MS, and their order determines queue priority for CP handling. An I/O IR sets a corresponding bit position in register (46) an controls the corresponding queue entry. A broadcast bus (11) connects the bit positions of the pending register to each of the CPs.