DIGITAL SERVO CONTROL SYSTEM FOR A DATA RECORDING DISK FILE

    公开(公告)号:CA1268857A

    公开(公告)日:1990-05-08

    申请号:CA532018

    申请日:1987-03-13

    Applicant: IBM

    Abstract: A digital servo control system for a data recording disk file receives as input a digital head position error signal (PES) and a digital signal corresponding to the head actuator input signal, and outputs a digital control signal. The control signal is integrated and amplified to provide the input signal to the actuator. The control signal is calculated from estimated values of absolute head position, head velocity and the equivalent actuator input signal required to compensate for constant or very low frequency bias forces. The estimated values are functions of respective predicted values, which in turn are functions of, among other things, constants representing the digital sampling time and physical parameters of the actuator. The updating of the estimated values from the respective predicted values is made with the use of an error term, which is the error between the measured absolute position and the predicted absolute head position. The predicted absolute head position is made sufficiently accurate that the error term is always less than a selected number of tracks. This permits the digital servo control system to operate during track seeking without counting track crossings so that the system is operable with servo information recorded either in sectors on a data disk or in continuous tracks on a dedicated servo disk.

    DISK FILE SERVO CONTROL SYSTEM WITH FAST REDUCTION OF REPEATABLE HEAD POSITION ERROR

    公开(公告)号:CA1228418A

    公开(公告)日:1987-10-20

    申请号:CA509087

    申请日:1986-05-14

    Applicant: IBM

    Abstract: An improvement to a disk file servo control system removes repeatable error from the read/write head position error signal (PES) during track following. The disk file includes a microprocessor 60 and associated memory devices 62, 64. A table of values of a sine function having a frequency equal to the disk rotational frequency is stored in a memory device. The microprocessor 60 receives each sample of PES from the servo control system and values from the sine function table in the memory device and computes a group of tap weights, each tap weight being a function of the PES sample, the value of a sine or cosine function with a frequency at one of the harmonics of the disk rotational frequency, a learning rate factor and the corresponding value of the tap weight for the previous PES sample. For each PES sample, the tap weights in a group are added to generate a repeatable error correction signal Uc which is summed with the control signal U to the head actuator, thereby generating a modified control signal Um which causes the head to follow the true track centerline. The repeatable error components are thus removed from the PES.

    ARCHITECTURE FOR MULTIPLE DISK FILE ASSEMBLIES IN A STANDARIZED FORM FACTOR PACKAGE

    公开(公告)号:CA2091082A1

    公开(公告)日:1993-09-11

    申请号:CA2091082

    申请日:1993-03-05

    Applicant: IBM

    Abstract: A multiple disk drive assembly in a 5 1/4 inch disk drive form factor having two 3 1/2 inch disk drive form factor head-disk assemblies (HDA) internally mounted on a rigid frame and accessible via a common industry-standard interface connector is provided. Both the interface and power connectors and the frame mounting hole patterns are industry standard to provide interchangeability with 5 1/4 inch form factor disk drives provided by manufacturers for use in computer systems. A single electronics controller board is shared by both HDAs and is mounted on the bottom side of the frame below the HDAs. The controller board may implement SCSI or IPI interfaces in either differential or single-ended versions. A spring vibration damper is utilized to minimize external vibration and shock effects on the HDAs and also to minimize the effects of vibration internally generated by one HDA on the adjacent HDA. The assembly is fully enclosed with metal top and bottom covers to provide separate enclosures for the HDAs and the controller board cooling and to provide EMC and RFI protection.

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