公开(公告)号：US3705393A

公开(公告)日：1972-12-05

申请号：US3705393D

申请日：1970-06-30

Applicant: IBM

Inventor： ANACKER WILHELM ,  ZAPPE HANS H

IPC: G11C11/44 ,  H01L39/22 ,  G11C5/02

CPC classification number: H01L39/223 ,  G11C11/44 ,  Y10S505/832

Abstract: A superconducting memory array where the memory cells are superconducting rings, each of which has at least one element therein capable of supporting Josephson tunneling current. Coincident currents are used to trap flux in the rings, and to release the trapped flux for readout of the memory cells. Fast operation and tolerable limits on drive currents are possible if one flux quantum operation is used. To achieve single flux quantum operation, the capacitance, inductance, and damping of each memory cell must be within certain limits.

公开(公告)号：US3906538A

公开(公告)日：1975-09-16

申请号：US42296073

申请日：1973-12-07

Applicant: IBM

Inventor： MATISOO JURI ,  ZAPPE HANS H

IPC: H01L39/22 ,  H01L27/12 ,  H01L45/00 ,  H03K3/38

CPC classification number: H01L39/223 ,  Y10S505/874

Abstract: The resonant conditions of non-linear Josephson junctions are reduced by shaping the junctions differently than a conventional rectangular shape. For a given value of L/ lambda J, where L is the junction length and lambda J is the Josephson penetration depth, non-rectangular junctions have reduced resonance current amplitudes when compared with rectangular junctions. The reduction in resonance current amplitudes allows the junction to be used in logic configurations with less stringent requirements on the current swings of the Josephson current required to perform switching.

Abstract translation: 通过与传统的矩形形状不同地形成结，减少了非线性约瑟夫逊结的共振条件。 对于L /λJ的给定值，其中L是结长，λJ是约瑟夫逊渗透深度，当与矩形结相比时，非矩形结结具有降低的谐振电流幅度。 谐振电流幅度的降低允许结点用于对执行切换所需的约瑟夫逊电流的电流摆幅要求较低的逻辑配置。

公开(公告)号：US3879715A

公开(公告)日：1975-04-22

申请号：US42941273

申请日：1973-12-28

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: G11C11/44 ,  H01L39/22 ,  G11C5/02

CPC classification number: G11C11/44 ,  Y10S505/832

Abstract: A memory cell comprising at least one Josephson junction is properly damped for effective operation by inductively coupling a resistive loop to the memory cell. The resistive loop may be located in the vicinity of the vertical projection of the memory cell so as to not affect the packing of a plurality of memory cells.

Abstract translation: 包含至少一个约瑟夫逊结的存储单元被适当阻尼，以通过将电阻回路感应耦合到存储单元来进行有效操作。 电阻回路可以位于存储单元的垂直投影附近，以便不影响多个存储单元的封装。

公开(公告)号：US3863078A

公开(公告)日：1975-01-28

申请号：US34100273

申请日：1973-03-14

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: G11C11/44 ,  H01L39/22 ,  H03K3/38 ,  H03K19/162 ,  H03K19/195 ,  H04L27/20 ,  H04L27/233 ,  H03K17/56

CPC classification number: H03K19/1952 ,  G11C11/44 ,  H01L39/223 ,  H03K3/38 ,  H04L27/2053 ,  H04L27/206 ,  H04L27/233 ,  Y10S505/856

Abstract: Josephson tunneling devices are used as parametrons in circuits for logic and memory. Parametron circuits are used as input devices to conventional pulsed Josephson tunneling device circuitry, and as output devices from pulsed Josephson tunneling device circuitry. Therefore, transfers from phase information to pulse information and from pulse information to phase information are obtained. Interconnection between superconducting circuit chips is achieved using Josephson tunneling parametrons and Josephson tunneling detectors. Another interconnection scheme uses capacitive coupling between superconducting circuit chips without physical interconnections therebetween, and employs Josephson tunneling devices on separate chips for the receiving and sending circuitry.

Abstract translation: 约瑟夫森隧道器件用作逻辑和存储器电路中的参数。 参数电路用作常规脉冲约瑟夫逊隧道装置电路的输入装置，以及来自脉冲约瑟夫逊隧道装置电路的输出装置。 因此，获得从相位信息到脉冲信息以及从脉冲信息到相位信息的转移。 使用约瑟夫逊隧道参数和约瑟夫逊隧道探测器实现超导电路芯片之间的互连。 另一种互连方案使用超导电路芯片之间的电容耦合，而在它们之间没有物理互连，并且在接收和发送电路的单独芯片上使用约瑟夫逊隧道装置。

公开(公告)号：CA1089541A

公开(公告)日：1980-11-11

申请号：CA295239

申请日：1978-01-18

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: H01L39/22 ,  H03K17/92 ,  H03K19/195

Abstract: JOSEPHSON INTERFEROMETER STRUCTURE WHICH SUPPRESSES RESONANCES Josephson interferometers contain inductive, capacitive and resistive components, and, as a result, such devices are subject to the presence of relatively high amplitude resonances similar to those found in in-line gates. Interferometer structures exhibit the same resonant behavior as long tunnel junctions, except that there exist only as many discrete resonance voltages as meshes in the interferometer device. Hence, a two-junction interferometer has one resonance as compared to two resonances in a three-junction device. In the I-V characteristic of a Josephson tunneling device such as an interferometer, such resonances appear as current steps which must be taken into account in the design of Josephson switching circuits primarily to avoid the situation where the load line of an external load intersects a resonance peak. Where the load line and the resonance peak intersect, because such an intersection is stable, the device is prevented from switching to the full voltage desired. Such resonances can be effectively suppressed in interferometers by providing a resistance which is in parallel with the main inductance of the interferometer. In a two-junction interferometer, the resistance is effectively connected between the base electrode metallizations which are utilized to form one of the electrodes of each of the pair of electrodes required for each interferometer junction. To the extent that more than two junctions are utilized, the resonance suppressing resistor is connected between pairs of junctions and across the main inductances which interconnect the junctions. The structure of a two-junction interferometer with its resonance-suppressing resistor, RSR, is shown as well as the schematics of a multiple junction interferometer which clearly indicates how such structures may be fabricated.

公开(公告)号：CA1035043A

公开(公告)日：1978-07-18

申请号：CA223598

申请日：1975-03-27

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: G11C11/14 ,  G11C11/44 ,  H01L39/22

Abstract: An information storage device which stores a single flux quantum without bias is disclosed. The device includes a single Josephson tunneling device made from two superconductive materials spaced apart by an insulator wherein a Josephson current density profile J1(x) defined by + INFINITY J1(x) =J1(x,y)dy - INFINITY IS CHARACTERIZED SUCH THAT THE PROFILE HAS A LARGER MAGNITUDE AT THE BOUNDARY PORTIONS OF SAID DEVICE THAN AT THE CENTER. The current density profile is controlled by adjusting either the oxide thicknesses, the work function of the superconductors or by changing the shape of the junction from its usual rectangular cross-section.

公开(公告)号：CA1035041A

公开(公告)日：1978-07-18

申请号：CA213221

申请日：1974-11-07

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: G11C11/44 ,  H01L39/22

Abstract: A memory cell comprising at least one Josephson junction is properly damped for effective operation by inductively coupling a resistive loop to the memory cell. The resistive loop may be located in the vicinity of the vertical projection of the memory cell so as to not affect the packing of a plurality of memory cells.

公开(公告)号：CA1060958A

公开(公告)日：1979-08-21

申请号：CA305240

申请日：1978-06-12

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: H03K19/195

Abstract: QUARTUM INTERFERENCE JOSEPHSON LOGIC DEVICES A quantum interference Josephson junction logic device is disclosed which comprises three or more junctions connected in parallel which are capable of carrying Josephson current and includes means integral with at least one of the junctions for carrying a larger maximum Josephson current than the remaining junctions. The spacing between the lobes of the threshold curve is increased over that of a two junction interferometer resulting in an increased operating region in which logic circuits switch to the voltage state. Good current gain with large lobe separation may be obtained if the two outer junctions having a zero field threshold current, Io, are connected via an inductance, L, to the center junction with a maximum Josephson current, 21o. Apart from the gain enhancement due to increased current in at least one of the junctions and that due to the combination of increased current in at least one of the junctions and the symmetrical dual feed, increased gain and operating range can be achieved using the symmetrical dual feed in combination with interferometer arrangements where the maximum Josephson current in all the junctions thereof is the same.

公开(公告)号：FR2316749A1

公开(公告)日：1977-01-28

申请号：FR7611978

申请日：1976-04-16

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: H03K19/195 ,  H01L39/22 ,  H03K17/92 ,  G11C11/44

Abstract: 1534785 Superconductive arrangements INTERNATIONAL BUSINESS MACHINES CORP 4 June 1976 [30 June 1975] 23291/76 Heading H3X In a superconductive interferometer circuit comprising three or more Josephson junctions connected in parallel with each other and with a load, the limits of gate current I to obtain effective switching control are rendered fess critical, and the gain improved, by setting the phase difference # across the junctions with zero applied field to substantially the same value before switching takes place. In its simplest form the outermost of 3 Josephson junctions J 1 to J3 are supplied with gate current through respective inductors L, while the junction J2 is fed directly and is such as to have a higher (e.g. double) maximum Josephson current I 0 than the other junctions, Fig. 2B (not shown). An improvement is to supply the gate current I g to the 3 junctions through a divided path connected to taps on inductor L, Fig. 3B, each path branch including an inductor L p of value L p = 3L. This arrangement may be formed as an integrated structure and optionally all junctions may have the same maximum I o value. An embodiment is also described using 4 junctions.

公开(公告)号：FR2274114A1

公开(公告)日：1976-01-02

申请号：FR7514033

申请日：1975-04-29

Applicant: IBM

Inventor： ZAPPE HANS H

IPC: G11C11/14 ,  G11C11/44 ,  H01L39/22 ,  G11C11/34

Abstract: An information storage device which stores a single flux quantum without bias is disclosed. The device includes a single Josephson tunneling device made from two superconductive materials spaced apart by an insulator wherein a Josephson current density profile J1(x) defined by + INFINITY J1(x) =J1(x,y)dy - INFINITY IS CHARACTERIZED SUCH THAT THE PROFILE HAS A LARGER MAGNITUDE AT THE BOUNDARY PORTIONS OF SAID DEVICE THAN AT THE CENTER. The current density profile is controlled by adjusting either the oxide thicknesses, the work function of the superconductors or by changing the shape of the junction from its usual rectangular cross-section.