公开(公告)号：SG67961A1

公开(公告)日：1999-10-19

申请号：SG1996010871

申请日：1996-10-16

Applicant: IBM

Inventor： BUSCH ROBERT EDWARD ,  ZICK KENNETH MICHAEL ,  HOULE ROBERT MAURICE

IPC: G06F1/10 ,  H03L7/18 ,  H04J3/06 ,  H04L7/033

Abstract: A circuit for synchronizing a multiplied system clock signal includes a device for generating a system clock signal, a first device that receives the system clock signal and generates a synchronization signal and at least one second device that receives the system clock signal and the synchronization signal. Each of the second devices includes a device for multiplying the system clock signal to produce the multiplied system clock signal and a device for synchronizing the multiplied system clock signal with each other multiplied system clock signal produced by the other second devices based on the synchronization signal.