公开(公告)号：DE3276516D1

公开(公告)日：1987-07-09

申请号：DE3276516

申请日：1982-12-28

Applicant: IBM ,  IBM FRANCE

Inventor： BOUDON GERARD ,  MOLLIER PIERRE ,  LEBESNERAIS GERARD

IPC: H04L25/38 ,  H04L25/45 ,  H04L25/48 ,  H04L25/49

公开(公告)号：FR2473810A1

公开(公告)日：1981-07-17

申请号：FR8000750

申请日：1980-01-09

Applicant: IBM FRANCE

Inventor： HORNUNG ROBERT ,  LEBESNERAIS GERARD

IPC: G01R17/06 ,  H03F3/45 ,  G11C7/00 ,  H03K13/02

公开(公告)号：FR2445617A1

公开(公告)日：1980-07-25

申请号：FR7837092

申请日：1978-12-28

Applicant: IBM FRANCE

Inventor： NUEZ JEAN-PAUL ,  LEBESNERAIS GERARD

IPC: H01L27/04 ,  H01L21/265 ,  H01L21/822 ,  H01L29/8605 ,  H01C7/00 ,  H01L29/36 ,  H01L29/76

公开(公告)号：FR2351505A1

公开(公告)日：1977-12-09

申请号：FR7615001

申请日：1976-05-13

Applicant: IBM FRANCE

Inventor： DELAPORTE FRANCOIS ,  HORNUNG ROBERT ,  LEBESNERAIS GERARD ,  NUEZ JEAN-PAUL ,  LAMOUROUX ANNE-MARIE

IPC: H01L27/04 ,  H01L21/326 ,  H01L21/822 ,  H01L27/08 ,  H01L29/8605 ,  H01L29/86 ,  H01L27/02

公开(公告)号：FR2430092A1

公开(公告)日：1980-01-25

申请号：FR7820115

申请日：1978-06-29

Applicant: IBM FRANCE

Inventor： BALLATORE DANIEL ,  DELAPORTE FRANCOIS ,  LEBESNERAIS GERARD ,  NUEZ JEAN-PAUL

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/08 ,  H01L29/78 ,  H01L29/8605 ,  H01L21/72 ,  H01L29/68

公开(公告)号：FR2404962A1

公开(公告)日：1979-04-27

申请号：FR7729867

申请日：1977-09-28

Applicant: IBM FRANCE

Inventor： HORNUNG ROBERT ,  LEBESNERAIS GERARD

IPC: G11C11/411 ,  H01L21/331 ,  H01L21/8226 ,  H01L27/02 ,  H01L27/082 ,  H01L29/73 ,  H03K3/288 ,  H03K19/091 ,  H03M1/00 ,  H03K19/08 ,  H01L27/06 ,  H03K3/286

公开(公告)号：FR2393430A1

公开(公告)日：1978-12-29

申请号：FR7717611

申请日：1977-06-02

Applicant: IBM FRANCE

Inventor： BLACHERE JEAN-MARIE ,  LEBESNERAIS GERARD

IPC: H01L21/761 ,  H01L27/102 ,  H01L29/74 ,  H04Q3/52 ,  H04M3/18 ,  H04Q1/52

Abstract: Coupling or connection of signal lines, esp. telephone lines into semi-conductor switches such as thyristors. The connection is made via a discrete semiconducting region bounded by an isolating region such that current loss to the substrate is minimised. Thi connection is achieved by integrating the thyristors into a semiconductor substrate to form a matrix of connection points, minimising insulation loss and diaphony. The structure consists of eight discrete layers of doped material to which may be added an annular region isolated from the structure surface.