公开(公告)号：DE3621469A1

公开(公告)日：1988-01-07

申请号：DE3621469

申请日：1986-06-26

Applicant: IBM DEUTSCHLAND

Inventor： SCHETTLER HELMUT DIPL ING ,  VOGEL ARMIN ,  WAGNER OTTO DIPL ING ,  ZUEHLKE RAINER DR ING

IPC: G01R31/30 ,  G01R31/3185 ,  G01R31/28 ,  H01L21/66

Abstract: A multiplicity of gate elements (gate arrays) which are arranged like a matrix are connected by means of their line outputs and by means of their column outputs to an oscillator circuit, whose first output is connected to all the column inputs and whose second output is connected to all the row inputs. In the event of defective gate elements, said elements are localised in that, during the detection of a defective gate element row, the gate element rows orthogonal thereto are selected successively via their address and via a signal data input. The gate element row located in front of and behind a defective gate element row is determined by oscillator loops. The individual gate elements consist of a plurality of gates and make it possible to change a signal flow from a line into a column and vice versa. This makes possible signal flow diversion which simplifies fault localisation and its representation in the course of a display.