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公开(公告)号:DE3310691A1
公开(公告)日:1984-09-27
申请号:DE3310691
申请日:1983-03-24
Applicant: IBM DEUTSCHLAND
Inventor: STADLER EWALD , WAGNER OTTO DIPL ING , GRUBER HARALD , STAHL RAINER DIPL ING
Abstract: The invention relates to a socket plate for a plug-in connection between a circuit board which is provided with plug pins and a printed circuit, and a circuit module which is provided with plug pins and has an upper and a lower covering plate and a plate which is located between them, is provided with resilient contacts in a sprung manner and is characterised in that it consists of an elastomeric material and has a matrix-like arrangement of continuous slots (7) which lie in rows and columns, in that the cover plates (9, 10) have an identical arrangement of outwardly inclined openings (2), and in that the side walls of the slots and the inclined surfaces of the openings have metallic contact strips (8) resting thereon, and in that this socket plate is held by means of an elastic frame which engages around the edges.
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公开(公告)号:DE3621469A1
公开(公告)日:1988-01-07
申请号:DE3621469
申请日:1986-06-26
Applicant: IBM DEUTSCHLAND
IPC: G01R31/30 , G01R31/3185 , G01R31/28 , H01L21/66
Abstract: A multiplicity of gate elements (gate arrays) which are arranged like a matrix are connected by means of their line outputs and by means of their column outputs to an oscillator circuit, whose first output is connected to all the column inputs and whose second output is connected to all the row inputs. In the event of defective gate elements, said elements are localised in that, during the detection of a defective gate element row, the gate element rows orthogonal thereto are selected successively via their address and via a signal data input. The gate element row located in front of and behind a defective gate element row is determined by oscillator loops. The individual gate elements consist of a plurality of gates and make it possible to change a signal flow from a line into a column and vice versa. This makes possible signal flow diversion which simplifies fault localisation and its representation in the course of a display.
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公开(公告)号:DE3675925D1
公开(公告)日:1991-01-10
申请号:DE3675925
申请日:1986-02-21
Applicant: IBM DEUTSCHLAND
IPC: G11C11/34 , G11C11/409 , G11C11/412 , G11C11/419
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