公开(公告)号：US10048212B2

公开(公告)日：2018-08-14

申请号：US14673986

申请日：2015-03-31

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Roel Gronheid ,  Lieve Van Look ,  Paulina Alejandra Rincon Delgadillo

IPC: G06F11/30 ,  G21C17/00 ,  G01N21/956 ,  G01N21/47 ,  G03F7/00

Abstract: A method for evaluating the quality of a directed self-assembling method used for generating directed self-assembling patterns. The method for evaluating comprises obtaining at least one set of parameter values for a parameterized set of processing steps and material properties characterizing the directed self-assembling method, thus characterizing a specific directed self-assembling method used for generating a directed self-assembled pattern. The method furthermore comprises obtaining a scattered radiation pattern on the directed self-assembled pattern obtained using the directed self-assembling method characterized by the set of parameter values, thus obtaining scattered radiation pattern results for the directed self-assembled pattern. The method furthermore comprises determining based on the scattered radiation pattern results a qualification score and correlating the qualification score with the set of parameter values.

公开(公告)号：US10824078B2

公开(公告)日：2020-11-03

申请号：US15813913

申请日：2017-11-15

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Roel Gronheid ,  Arjun Singh ,  Werner Knaepen

IPC: G03F7/20 ,  G03F7/42 ,  G03F7/004 ,  G03F7/40 ,  G03F7/38 ,  G03F7/00 ,  G03F7/09

Abstract: An example embodiment relates to a method for making a mask layer. The method may include providing a patterned layer on a substrate, the patterned layer including at least a first set of lines of an organic material of a first nature, the lines having a line height, a first line width roughness, and being separated either by voids or by a material of a second nature. The method may further include infiltrating at least a top portion of the first set of lines with a metal or ceramic material. The method may further include removing the organic material by oxidative plasma etching, thereby forming a second set of lines of metal or ceramic material on the substrate, the second set of lines having a second line width roughness, smaller than the first line width roughness.

公开(公告)号：US10204782B2

公开(公告)日：2019-02-12

申请号：US15132091

申请日：2016-04-18

Applicant: ASM IP Holding B.V. ,  IMEC VZW

Inventor： Jan Willem Maes ,  Werner Knaepen ,  Roel Gronheid ,  Arjun Singh

IPC: H01L21/33 ,  H01L21/033 ,  G03F7/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/32

Abstract: A method for forming a film with an annealing step and a deposition step is disclosed. The method comprises an annealing step for inducing self-assembly or alignment within a polymer. The method also comprises a selective deposition step in order to enable selective deposition on a polymer.

公开(公告)号：US20160322461A1

公开(公告)日：2016-11-03

申请号：US15204853

申请日：2016-07-07

Applicant: IMEC VZW

Inventor： Boon Teik Chan ,  Safak Sayan ,  Min-Soo Kim ,  Doni Parnell ,  Roel Gronheid

IPC: H01L29/10 ,  H01L29/78 ,  H01L21/308 ,  H01L29/66 ,  H01L21/3065 ,  H01L29/06 ,  H01L21/762

CPC classification number: H01L29/1037 ,  H01L21/0273 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method for producing fin structures, using Directed Self Assembly (DSA) lithographic patterning, in an area of a semiconductor substrate includes providing a semiconductor substrate covered with a shallow trench isolation (STI) layer stack on a side thereof; defining a fin area on that side of the substrate by performing a lithographic patterning step other than DSA, wherein the fin structures will be produced in the fin area; and producing the fin structures in the semiconductor substrate within the fin area according to a predetermined fin pattern using DSA lithographic patterning. The disclosure also relates to associated semiconductor structures.

公开(公告)号：US20150276624A1

公开(公告)日：2015-10-01

申请号：US14673986

申请日：2015-03-31

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Roel Gronheid ,  Lieve Van Look ,  Paulina Alejandra Rincon Delgadillo

IPC: G01N21/956 ,  G01N21/47

CPC classification number: G01N21/95607 ,  G01N21/47 ,  G01N2201/12 ,  G03F7/0002

Abstract: A method for evaluating the quality of a directed self-assembling method used for generating directed self-assembling patterns. The method for evaluating comprises obtaining at least one set of parameter values for a parameterized set of processing steps and material properties characterizing the directed self-assembling method, thus characterizing a specific directed self-assembling method used for generating a directed self-assembled pattern. The method furthermore comprises obtaining a scattered radiation pattern on the directed self-assembled pattern obtained using the directed self-assembling method characterized by the set of parameter values, thus obtaining scattered radiation pattern results for the directed self-assembled pattern. The method furthermore comprises determining based on the scattered radiation pattern results a qualification score and correlating the qualification score with the set of parameter values.

Abstract translation: 用于评估用于产生定向自组装图案的定向自组装方法的质量的方法。 评估方法包括获得用于参数化的一组处理步骤和表征定向自组装方法的材料特性的至少一组参数值，从而表征用于产生定向自组装图案的特定定向自组装方法。 该方法还包括使用以一组参数值为特征的定向自组装方法获得的定向自组装图案上获得散射辐射图，从而获得用于定向自组装图案的散射辐射图案结果。 该方法还包括基于散射辐射模式结果确定资格分数并将资格分数与参数值集合相关联。

公开(公告)号：US10741394B2

公开(公告)日：2020-08-11

申请号：US16254841

申请日：2019-01-23

Applicant: ASM IP Holding B.V. ,  IMEC VZW ,  Katholieke Universiteit Leuven

Inventor： Jan Willem Maes ,  Werner Knaepen ,  Roel Gronheid ,  Arjun Singh

IPC: H01L21/00 ,  H01L21/033 ,  G03F7/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/32

Abstract: A method for forming a film with an annealing step and a deposition step is disclosed. The method comprises an annealing step for inducing self-assembly or alignment within a polymer. The method also comprises a selective deposition step in order to enable selective deposition on a polymer.

公开(公告)号：US10551741B2

公开(公告)日：2020-02-04

申请号：US16094119

申请日：2017-04-07

Applicant: ASM IP HOLDING B.V. ,  IMEC VZW

Inventor： Werner Knaepen ,  Jan Willem Maes ,  Maarten Stokhof ,  Roel Gronheid ,  Hari Pathangi Sriraman

IPC: G03F7/16 ,  H01L21/027 ,  H01L21/67 ,  H01L21/768 ,  H01L51/00 ,  H01L21/469 ,  H01L21/31 ,  B05D3/04 ,  B05D3/02

Abstract: A method of forming a directed self-assembled (DSA) layer on a substrate by: providing a substrate; applying a layer comprising a self-assembly material on the substrate; and annealing of the self-assembly material of the layer to form a directed self-assembled layer by providing a controlled temperature and gas environment around the substrate. The controlled gas environment comprises molecules comprising an oxygen element with a partial pressure between 10-2000 Pa.

公开(公告)号：US10192956B2

公开(公告)日：2019-01-29

申请号：US15204853

申请日：2016-07-07

Applicant: IMEC VZW

Inventor： Boon Teik Chan ,  Safak Sayan ,  Min-Soo Kim ,  Doni Parnell ,  Roel Gronheid

IPC: H01L29/10 ,  H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L21/027 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3065 ,  H01L29/66

Abstract: A method for producing fin structures, using Directed Self Assembly (DSA) lithographic patterning, in an area of a semiconductor substrate includes providing a semiconductor substrate covered with a shallow trench isolation (STI) layer stack on a side thereof; defining a fin area on that side of the substrate by performing a lithographic patterning step other than DSA, wherein the fin structures will be produced in the fin area; and producing the fin structures in the semiconductor substrate within the fin area according to a predetermined fin pattern using DSA lithographic patterning. The disclosure also relates to associated semiconductor structures.

公开(公告)号：US20180173109A1

公开(公告)日：2018-06-21

申请号：US15813913

申请日：2017-11-15

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Roel Gronheid ,  Arjun Singh ,  Werner Knaepen

IPC: G03F7/20 ,  G03F7/004 ,  G03F7/42

CPC classification number: G03F7/70625 ,  G03F7/0002 ,  G03F7/0047 ,  G03F7/094 ,  G03F7/38 ,  G03F7/40 ,  G03F7/423 ,  G03F7/427

Abstract: An example embodiment relates to a method for making a mask layer. The method may include providing a patterned layer on a substrate, the patterned layer including at least a first set of lines of an organic material of a first nature, the lines having a line height, a first line width roughness, and being separated either by voids or by a material of a second nature. The method may further include infiltrating at least a top portion of the first set of lines with a metal or ceramic material. The method may further include removing the organic material by oxidative plasma etching, thereby forming a second set of lines of metal or ceramic material on the substrate, the second set of lines having a second line width roughness, smaller than the first line width roughness.

公开(公告)号：US20180076092A1

公开(公告)日：2018-03-15

申请号：US15704837

申请日：2017-09-14

Applicant: IMEC VZW

Inventor： Roel Gronheid ,  Vladimir Machkaoutsan

IPC: H01L21/8234 ,  H01L21/308 ,  H01L21/306 ,  H01L21/02 ,  H01L21/762

CPC classification number: H01L21/823431 ,  G03F7/0002 ,  H01L21/02118 ,  H01L21/02356 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/76224 ,  H01L21/823481 ,  H01L29/66795

Abstract: The present disclosure relates to methods and structures that involve the use of directed self-assembly to selectively remove at least one fin or fin section from a pattern of parallel fins in a semiconductor structure.