2.
    发明专利
    未知

    公开(公告)号:DE10137345B4

    公开(公告)日:2004-07-08

    申请号:DE10137345

    申请日:2001-07-31

    Abstract: A test circuit for testing an integrated circuit, includes a test signal input for receiving a test signal from the integrated circuit and a reference signal input for receiving a reference signal. A comparator is in communication with the test signal input and with the reference signal input. The comparator is configured to provide, at a comparator output, an error signal if a comparison between the reference signal and the test signal indicates an error. The error signal, if present, is stored in an error memory, in communication with the comparator output.

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