Patent search ap:("INFINEON TECHNOLOGIES AG") AND inv:"BERGLER STEFAN" Page 1

1.

发明专利
未知

公开(公告)号：DE102004031669B3

公开(公告)日：2006-02-09

申请号：DE102004031669

申请日：2004-06-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SIEGLER SASCHA , WEBER GERHARD , BAUMANN THOMAS , BERGLER STEFAN

IPC: H03K5/153

2.

发明专利
Circuit path examining method for integrated circuit application, involves examining timing performance of circuit path as correct/incorrect, respectively, if pair of setup and hold time does not make/makes timing violation 未知

公开(公告)号：DE102004044668A1

公开(公告)日：2006-03-30

申请号：DE102004044668

申请日：2004-09-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LANG ALFRED , BERGLER STEFAN

IPC: G06F17/50

Abstract: The method involves identifying a timing performance of a circuit path to be examined, as correct, if a pair of a set up and holding time from several pairs, does not make a timing violation. The timing performance is identified as incorrect, if the pair of setup and holding time from the several pairs makes a timing violation. A pair with shortest possible set up time is determined as set up time and holding time for the path. An independent claim is also included for a device for examining a circuit path.

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