-
公开(公告)号:DE10321441A1
公开(公告)日:2003-12-04
申请号:DE10321441
申请日:2003-05-13
Applicant: INFINEON TECHNOLOGIES AG
Inventor: BOSCH CATHERINE , HUCKABY JENNIFER FAYE , NINO JR LEONEL R , PARTSCH TORSTEN
IPC: G06F12/00 , G06F12/06 , G06F13/16 , G11C7/10 , G11C11/4076
Abstract: A circuit and method of operation for combining commands in a DRAM (dynamic random access memory) are revealed. The method applies to DRAMs having a plurality of memory banks or arrays. The method combines commands to rows on different memory banks, and the method also combines row and column commands on different memory banks. The method eliminates steps in a sequence of commands, and may significantly increase speed of input/output to a DRAM.