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公开(公告)号:WO2004093103B1
公开(公告)日:2004-12-29
申请号:PCT/EP2004004084
申请日:2004-04-16
Applicant: INFINEON TECHNOLOGIES AG , BRAUN DANIEL
Inventor: BRAUN DANIEL
CPC classification number: B82Y25/00 , G11C11/16 , H01F10/324
Abstract: A magnetic element which can switch states using a relatively low magnetic field. The magnetic element comprises first and second magnetic layers separated by an intermediate layer. The magnetization of the first magnetic layer is fixed in a first direction parallel to the easy axis. The second magnetic layer comprises first and second magnetization vectors which are in opposite directions to create a magnetic boundary therein. The magnetic boundary can be driven out of the second magnetic layer by shifting the boundary along a first or second direction along the easy axis.
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公开(公告)号:FR2882459A1
公开(公告)日:2006-08-25
申请号:FR0600574
申请日:2006-01-23
Applicant: INFINEON TECHNOLOGIES AG , ALTIS SEMICONDUCTOR SNC
Inventor: KLOSTERMANN ULRICH , BRAUN DANIEL
IPC: G11C11/15 , H01L21/8246 , H01L43/08
Abstract: Mémoire magnétorésistive comportant un premier système magnétique (R), un second système magnétique incluant une couche libre de jonction à effet tunnel ferromagnétique (FL1) dans lequel le premier système magnétique (R) est pris en sandwich entre la couche libre de jonction à effet tunnel (FL1) et au moins une des couches libres ferromagnétiques (FL1, FL2) du second système magnétique.
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公开(公告)号:DE102005033480A1
公开(公告)日:2006-02-16
申请号:DE102005033480
申请日:2005-07-18
Applicant: INFINEON TECHNOLOGIES AG
Inventor: BRAUN DANIEL , MUELLER GERHARD
Abstract: A magnetic tunnel junction (MTJ) device is configured to store at least two bits of data in a single cell utilizing the variable resistance characteristic of a MTJ. The MTJ includes a soft and two fixed magnetic layers with fixed field directions oriented in perpendicular directions. The soft magnetic layer is separated from the fixed layers by insulating layers preferably with different thicknesses, or with different material compositions. The resulting junction resistance can exhibit at least four distinct resistance values dependent on the magnetic orientation of the free magnetic layer. The cell is configured using a pattern with four lobes to store two bits, and eight lobes to store three bits. The resulting cell can be used to provide a fast, non-volatile magnetic random access memory (MRAM) with high density and no need to rewrite stored data after they are read, or as a fast galvanic isolator.
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公开(公告)号:DE102005035154B4
公开(公告)日:2007-10-04
申请号:DE102005035154
申请日:2005-07-27
Applicant: INFINEON TECHNOLOGIES AG , ALTIS SEMICONDUCTOR SNC
Inventor: BRAUN DANIEL , BEER PETER , LEUSCHNER RAINER , KLOSTERMANN ULRICH
IPC: G11C11/16
Abstract: A magnetic memory element including a magnetic storage element including two magnetic layers made of magnetic material, said two magnetic layers opposing each other in a parallel relationship and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, said two magnetic layers further having a magnetic anisotropy, while its magnetization vectors are magnetically coupled to at least one current line, wherein said two magnetic layers are arranged on a same side of said at least one current line, and a magnetic sensor element including at least one magnetic layer having a magnetization vector being magnetically coupled to said magnetization vectors of said two magnetic layers of said magnetic storage element, said magnetic sensor element being electrically coupled to said at least one current line.
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公开(公告)号:DE102005046426A1
公开(公告)日:2006-04-06
申请号:DE102005046426
申请日:2005-09-28
Applicant: INFINEON TECHNOLOGIES AG , ALTIS SEMICONDUCTOR SNC CORBEI
Inventor: FERRANT RICHARD , BRAUN DANIEL
IPC: H01L27/22 , H01L21/822 , H01L27/105
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公开(公告)号:DE102005035154A1
公开(公告)日:2006-03-09
申请号:DE102005035154
申请日:2005-07-27
Applicant: INFINEON TECHNOLOGIES AG , ALTIS SEMICONDUCTOR SNC CORBEI
Inventor: BRAUN DANIEL , BEER PETER , LEUSCHNER RAINER , KLOSTERMANN ULRICH
IPC: G11C11/16
Abstract: A magnetic memory element including a magnetic storage element including two magnetic layers made of magnetic material, said two magnetic layers opposing each other in a parallel relationship and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, said two magnetic layers further having a magnetic anisotropy, while its magnetization vectors are magnetically coupled to at least one current line, wherein said two magnetic layers are arranged on a same side of said at least one current line, and a magnetic sensor element including at least one magnetic layer having a magnetization vector being magnetically coupled to said magnetization vectors of said two magnetic layers of said magnetic storage element, said magnetic sensor element being electrically coupled to said at least one current line.
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公开(公告)号:DE102005033480B4
公开(公告)日:2010-08-26
申请号:DE102005033480
申请日:2005-07-18
Applicant: INFINEON TECHNOLOGIES AG
Inventor: BRAUN DANIEL , MUELLER GERHARD
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公开(公告)号:DE102006001108A1
公开(公告)日:2006-08-31
申请号:DE102006001108
申请日:2006-01-09
Applicant: INFINEON TECHNOLOGIES AG , ALTIS SEMICONDUCTOR SNC
Inventor: KLOSTERMANN ULRICH , BRAUN DANIEL
Abstract: A magnetoresistive memory element has a stacked structure including: a tunneling barrier made of non-magnetic material, a first magnetic system with a ferromagnetic tunneling junction reference layer barrier having a fixed magnetic moment vector on one side of the tunneling adjacent to the non-magnetic material, and a second magnetic system with a ferromagnetic tunneling junction free layer on an opposite side of the tunneling barrier having a free magnetic moment vector adjacent to the non-magnetic material and forming a magnetoresistive tunneling junction. The tunneling junction free layer is one of a plurality of N ferromagnetic free layers which are antiferromagnetically coupled. The first magnetic system is sandwiched in between the tunneling junction free layer and at least one of the ferromagnetic free layers that are anti-ferromagnetically coupled therewith.
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公开(公告)号:DE102005055437A1
公开(公告)日:2006-07-06
申请号:DE102005055437
申请日:2005-11-21
Applicant: INFINEON TECHNOLOGIES AG , ALTIS SEMICONDUCTOR SNC CORBEI
Inventor: BRAUN DANIEL
Abstract: A magnetoresistive memory cell includes a magnetic tunnel junction including first (fixed) and second (free) magnetic regions, where the second magnetic region includes at least two ferromagnetic layers being antiferromagnetically coupled. The magnetoresistive memory cell further includes a switchable ferromagnetic offset field layer being provided with a free magnetic moment vector that is freely switchable between the same and opposite directions with respect to the fixed magnetic moment vector of the first magnetic region. A method of switching a magnetoresistive memory cell includes adiabatic rotational switching, where the memory cell is brought in an active state exhibiting reduced switching fields before its switching and is brought in a passive state exhibiting enlarged switching fields after its switching.
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公开(公告)号:DE102005052508A1
公开(公告)日:2006-05-18
申请号:DE102005052508
申请日:2005-11-03
Applicant: INFINEON TECHNOLOGIES AG
Inventor: BRAUN DANIEL , KLOSTERMANN ULRICH
Abstract: A reference current source for a magnetic memory device is preferably configured with magnetic tunnel junction cells and includes more than four reference magnetic memory cells to improve reliability of the magnetic memory device and to reduce sensitivity at a device level to individual cell failures. The reference current source includes a large number of magnetic memory cells coupled in an array, and a current source provides a reference current dependent on the array resistance. In another embodiment a large number of magnetic memory cells are coupled to current sources that are summed and scaled to produce a reference current source. A current comparator senses the unknown state of a magnetic memory cell. In a further embodiment, an array of magnetic memory cells is configured to provide a non-volatile, adjustable resistance. In a further embodiment, the array of magnetic memory cells is configured with a tap to provide a non-volatile, adjustable potentiometer.
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