公开(公告)号：WO2006117236A3

公开(公告)日：2007-01-04

申请号：PCT/EP2006004238

申请日：2006-05-05

Applicant: INFINEON TECHNOLOGIES AG ,  DANIEL ALAN

Inventor： DANIEL ALAN

IPC: H03K4/502

CPC classification number: H03K3/012 ,  H03K3/0231

Abstract: An oscillator according to the present invention reduces power consumption by enlarging the pulsewidth of an oscillator output pulse. Since this pulse disables an oscillator current source, the enlarged pulsewidth reduces the time the current source is enabled. When a first capacitor charges to at least a reference voltage, a differential amplifier produces a low level signal that is provided to a latch generating the output pulse. The low level signal controls the latch to produce and maintain a high level signal until the latch is triggered. The latch signal disables the current source, while enabling a transistor to transfer charge from the first capacitor to a second capacitor. When the second capacitor attains a sufficient voltage, the latch is triggered to produce a low level signal, thereby enlarging the pulsewidth of the output pulse. The low level signal enables the current source and facilitates discharge of the second capacitor.

Abstract translation: 根据本发明的振荡器通过放大振荡器输出脉冲的脉冲宽度来降低功耗。 由于该脉冲禁用振荡器电流源，因此放大的脉冲宽度减少了电流源使能的时间。 当第一电容器至少对基准电压充电时，差分放大器产生提供给产生输出脉冲的锁存器的低电平信号。 低电平信号控制锁存器产生和保持高电平信号，直到锁存器被触发。 锁存信号禁止电流源，同时使晶体管能够将电荷从第一电容器转移到第二电容器。 当第二电容器达到足够的电压时，触发锁存器产生低电平信号，从而扩大输出脉冲的脉冲宽度。 低电平信号使电流源能够使第二电容器放电。

公开(公告)号：DE102004034184A1

公开(公告)日：2005-02-24

申请号：DE102004034184

申请日：2004-07-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DANIEL ALAN ,  KUNCE CHRISTOPHER W

IPC: G11C5/00 ,  G11C11/407 ,  G11C11/4093 ,  G11C29/00

公开(公告)号：DE112006000060T5

公开(公告)日：2007-08-09

申请号：DE112006000060

申请日：2006-05-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DANIEL ALAN

IPC: H03K3/354 ,  H03K19/00

Abstract: An oscillator according to the present invention reduces power consumption by enlarging the pulsewidth of an oscillator output pulse. Since this pulse disables an oscillator current source, the enlarged pulsewidth reduces the time the current source is enabled. When a first capacitor charges to at least a reference voltage, a differential amplifier produces a low level signal that is provided to a latch generating the output pulse. The low level signal controls the latch to produce and maintain a high level signal until the latch is triggered. The latch signal disables the current source, while enabling a transistor to transfer charge from the first capacitor to a second capacitor. When the second capacitor attains a sufficient voltage, the latch is triggered to produce a low level signal, thereby enlarging the pulsewidth of the output pulse. The low level signal enables the current source and facilitates discharge of the second capacitor.

公开(公告)号：DE102006007326A1

公开(公告)日：2006-08-24

申请号：DE102006007326

申请日：2006-02-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BOWYER STEPHEN ,  DANIEL ALAN

IPC: G11C29/52 ,  G06F11/08 ,  G06F11/10

Abstract: The circuit has a data memory (52) to receive and store a data, and a write tree (56) to receive the data and produce a parity data. A parity memory (54) receives and holds the parity data. A read tree (58) receives the data from the data memory and thee parity data from the parity memory. The read tree also produces a display, whether an error is occurred in the data during storage within the data memory. Independent claims are also included for the following: (1) an application housing with an application chip and a evidently good chip (2) a memory device with a data memory (3) a method for detecting an error in a memory device (4) a method for manufacturing an application housing (5) a error correction method.