公开(公告)号：DE59611182D1

公开(公告)日：2005-02-24

申请号：DE59611182

申请日：1996-04-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEITER THOMAS ,  NAEHER DR ,  HIEROLD DR

IPC: C23F1/02 ,  C23F1/12 ,  H01L21/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/311

Abstract: The method involves bringing a sample (1) to be treated, containing SiO2, into a receptacle (2) having at least one gas inlet opening (3) and a gas outlet opening (4). Controllable valves (5) are used to supply measured quantities of fluorine acid gas and steam into the receptacle. The gases fed into the receptacle reach to the silicon dioxide in the sample in sufficient quantity for etching. However the gases are limited such that condensation of the steam into fluid water on the sample during the etching process is reduced. An etching process is then carried out. Steam which is produced as a reaction product by etching is removed before the appearance of condensation through the gas outlet opening. At the same time, an inert gas, e.g. N2, is fed into the receptacle through the gas inlet. These steps are all repeated as often as required.

公开(公告)号：DE59510490D1

公开(公告)日：2003-01-16

申请号：DE59510490

申请日：1995-09-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIEROLD DR ,  SCHWARZBAUER DR

IPC: H01L21/822 ,  H01L27/02 ,  H01L27/04 ,  H01L29/78

Abstract: The power semiconductor component includes a load transistor (LT) together with which two further transistors (ST1, ST2) and two resistors (R1, R2) are monolithically integrated. A series circuit of the transistor (ST1) and the resistor (R1), together with the load transistor form a current mirror. A measurement voltage (U1) is applied to the resistor (R1). A second series circuit of the second further transistor (ST2) and the second resistor (R2) together with the load transistor form a second current mirror. A second measuring voltage (U2) is applied to the second resistor (R2).

公开(公告)号：DE59709884D1

公开(公告)日：2003-05-28

申请号：DE59709884

申请日：1997-06-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIEROLD DR ,  NOE PROF DR ,  SCHEITER DR ,  STEGER MAX

IPC: G01L1/14 ,  G01D5/24 ,  G01L9/00 ,  G01L9/12 ,  G01P15/125 ,  G01R17/10 ,  G01R27/26

Abstract: The circuit has the measuring sensor capacitor connected in a bridge circuit with 3 further capacitors, the bridge circuit acting as part of the input stage of a modulator. Pairs of switches (ed,od) and a clock control (TG) allow both inputs (k3,k5) of the bridge circuit to be supplied with 2 different potentials in alternation. Pref. the bridge circuit contains a pair of identical measuring sensor capacitors, associated with identical reference capacitors, with a measuring sensor capacitor and a reference capacitor connected between each input and output of the bridge circuit.