公开(公告)号：DE59913841D1

公开(公告)日：2006-10-26

申请号：DE59913841

申请日：1999-01-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GEORGAKOS GEORG ,  KASPRICK KAI ,  PETER JUERGEN ,  BLOCH MARTIN ,  KERN THOMAS DR ,  PIOREK THOMAS

IPC: G11C16/02 ,  G11C16/06 ,  G11C16/04 ,  G11C16/10

Abstract: The EEPROM has several memory cells which can be programmed, read out from and erased via selection, control, bit and source lines. The memory cells each have a memory transistor and a selection transistor connected in series with the memory transistor. The drain terminal of the memory transistor is connected to the bit line. The source terminal of the selection transistor is connected to the source line. A control unit is provided. This is arranged such that the programming voltage required for programming a memory cell is fed via the source line. Separate source lines may be provided for individual memory cells of groups of memory cells. The source lines are preferably adapted to apply high voltages to the memory cells.