公开(公告)号：DE102005060943A1

公开(公告)日：2006-07-20

申请号：DE102005060943

申请日：2005-12-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIEHL OLIVER

IPC: G06F13/28

Abstract: Method for controlling the burst length of a data transmission. A preferred embodiment comprises initiating a fixed burst length transmission and issuing a burst terminate command specifying a desired length of the burst data transfer, wherein the burst terminate command is issued prior to the completion of the fixed burst length data transfer. The burst terminate command specifies an address of a final data to be transferred by the fixed burst length transmission.

公开(公告)号：DE10141484C2

公开(公告)日：2003-12-24

申请号：DE10141484

申请日：2001-08-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUCKERBAUER HERMANN ,  KIEHL OLIVER

IPC: G06F12/14 ,  G11C16/22 ,  G06F12/16

Abstract: The invention relates to an electronic assembly having a non-volatile memory device with a controllable write protection feature and a switching configuration for generating a write protection signal from potentials at the supply terminals of the electronic assembly.

公开(公告)号：DE10142361A1

公开(公告)日：2003-04-24

申请号：DE10142361

申请日：2001-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIEHL OLIVER

IPC: G11C5/02 ,  G11C5/04 ,  H05K1/02 ,  H05K1/18

Abstract: A memory module has multiple memory chips (2-19) on a first surface of a rectangular printed circuit board (1) with pins (22) along one side forming a connector edge (24). The pins link to DQ connectors on the memory chips via a resistor. With their shorter sides the memory chips are arranged in a row along the printed circuit board so that the longer sides of the chips run parallel to each other and vertical to the longitudinal direction of the printed circuit board.

公开(公告)号：DE69836183T2

公开(公告)日：2007-08-30

申请号：DE69836183

申请日：1998-08-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIEHL OLIVER

IPC: G11C7/06 ,  G11C11/419 ,  G11C11/409

Abstract: A sensing system for sensing data from a data source and driving a pair of output lines in response thereto comprises: a primary sensing device operatively coupled to the data source for sensing and storing said data therein; and a secondary sensing device operatively coupled to the primary sensing device via a pair of input lines and also operatively coupled to the pair of output lines, the secondary sensing device being responsive to a differential voltage generated across the pair of input lines in accordance with said data stored by the primary sensing device and the secondary sensing device having a differential voltage threshold range associated therewith defined by a negative threshold and a positive threshold, whereby the secondary sensing device drives the pair of output lines to a first output condition when the differential voltage across the pair of input lines is within the differential voltage threshold range, to a second output condition when the differential voltage is at least equal to the negative threshold, and to a third output condition when the differential voltage is at least equal to the positive threshold.

公开(公告)号：DE60117048T2

公开(公告)日：2006-09-21

申请号：DE60117048

申请日：2001-11-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIEHL OLIVER

IPC: H03K19/00 ,  G06F13/40 ,  H03K17/16 ,  H03K19/003 ,  H03K19/017

Abstract: A receiver circuit includes a first circuit having two modes of operation controlled by a feedback loop. The feedback loop is connected to an output of the first circuit, and the modes of operation include a first mode having a quicker response to an input falling signal edge than a second mode and a second mode with a quicker response to an input rising signal edge than the first mode. A driver stage is integrated into the first circuit to favor the rising edge or the falling edge in accordance with a control signal provided by the feedback loop.

公开(公告)号：DE10231954B4

公开(公告)日：2006-03-02

申请号：DE10231954

申请日：2002-07-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIEHL OLIVER

IPC: G06F1/08 ,  G11C7/12 ,  G11C7/22 ,  G11C8/18 ,  G11C11/4076 ,  G11C11/4094

Abstract: An input receives an external cycle (12) with a clock pulsed period duration. A facilitating device (22) makes information available to a circuit component (10). This information represents the clock pulse period duration of an external cycle. A time function element (26) controls a signal in the circuit component based on the information that represents the clock pulsed period duration.

公开(公告)号：DE10245248A1

公开(公告)日：2004-04-08

申请号：DE10245248

申请日：2002-09-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIEHL OLIVER ,  BRAUN GEORG ,  RUCKERBAUER HERMANN

IPC: G11C7/10 ,  G11C11/4093 ,  G11C7/00

Abstract: Memory parameter devices have lasting storage for the features of a semiconductor/dual in-line memory module (DIMM) (3) and are programmable e-fuses that fit on each semiconductor memory component/dynamic (DRAM) or static/shadow (SRAM) RAM component (11,12 ... 1n) and are in a closed or non-closed condition corresponding to stored parameter data. Independent claims are also included for the following: (a) A semiconductor component like dynamic RAM or static/shadow RAM for use on the semiconductor memory module; (b) and for a semiconductor memory system with a semiconductor memory module.

公开(公告)号：DE10153659A1

公开(公告)日：2003-05-22

申请号：DE10153659

申请日：2001-10-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUCKERBAUER HERMANN ,  KIEHL OLIVER

IPC: G06F12/14 ,  G06F21/64 ,  G06F21/79 ,  G11C16/22 ,  G11C8/20

Abstract: Method for detecting changed contents in an EEPROM memory component, whereby the manufacturer sets the contents of the EEPROM at the time of production. The method has the following steps: storage of a checksum value with the memory contents at the time of writing data contents to the memory and at any later time checking of the checksum to determine if the memory contents have been altered. An Independent claim is made for an EEPROM with a number of reserved bytes for storage of checking information or a checksum value so that memory contents can be checked. The invention relates particularly to a DIMM memory component.

公开(公告)号：DE10141484A1

公开(公告)日：2003-03-20

申请号：DE10141484

申请日：2001-08-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUCKERBAUER HERMANN ,  KIEHL OLIVER

IPC: G06F12/14 ,  G11C16/22 ,  G06F12/16

Abstract: Electronic assembly (BG) has a non-volatile memory (SpE) with a controllable write protection connection (XWP) and at least a pair of power connections for supply of the non-volatile memory as well as a third supply connection (Vx) for a connection device (AE). A circuit arrangement (SA) is provided to connect the write protection connection via a signal path to the third supply connection so that write protection in a target system is activated by the power connection. An Independent claim is made for a method for writing to non-volatile memory with controllable write protection that allows re-writing of the memory in a test location.

公开(公告)号：DE112004001830T5

公开(公告)日：2006-07-20

申请号：DE112004001830

申请日：2004-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIEHL OLIVER

IPC: H04L25/49

Abstract: System and method for reducing power consumption and noise in a transmission system with an asymmetrically terminated transmission line. A preferred embodiment comprises encoding data words to reduce the number of times a given state appears in a code word. The preferred embodiment comprises counting the number of times a given state appears in a data word. If the count is greater than half of the total number of bits in the data word, then the data word is inverted and a weight bit can be set to the given state. If the count is less than (or equal to) half of the total number of bits, then the data word may be unchanged and the weight bit can be set to the inverse of the given state. The code word can be generated by appending the weight bit to the data word.